[llvm] r329274 - [llvm-mca] Remove flag -max-retire-per-cycle, and update the docs.

[Andrea Di Biagio via llvm-commits]

Author: adibiagio
Date: Thu Apr  5 04:36:50 2018
New Revision: 329274

URL: http://llvm.org/viewvc/llvm-project?rev=329274&view=rev
Log:
[llvm-mca] Remove flag -max-retire-per-cycle, and update the docs.

This is done in preparation for D45259.
With D45259, models can specify the size of the reorder buffer, and the retire
throughput directly via tablegen.

Modified:
    llvm/trunk/docs/CommandGuide/llvm-mca.rst
    llvm/trunk/tools/llvm-mca/Backend.h
    llvm/trunk/tools/llvm-mca/Dispatch.h
    llvm/trunk/tools/llvm-mca/llvm-mca.cpp

Modified: llvm/trunk/docs/CommandGuide/llvm-mca.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CommandGuide/llvm-mca.rst?rev=329274&r1=329273&r2=329274&view=diff
==============================================================================
--- llvm/trunk/docs/CommandGuide/llvm-mca.rst (original)
+++ llvm/trunk/docs/CommandGuide/llvm-mca.rst Thu Apr  5 04:36:50 2018
@@ -68,11 +68,6 @@ option specifies "``-``", then the outpu
  defaults to the 'IssueWidth' specified by the processor scheduling model.
  If width is zero, then the default dispatch width is used.
 
-.. option:: -max-retire-per-cycle=<retire throughput>
-
- Specify the retire throughput (i.e. how many instructions can be retired by the
- retire control unit every cycle).
-
 .. option:: -register-file-size=<size>
 
  Specify the size of the register file. When specified, this flag limits

Modified: llvm/trunk/tools/llvm-mca/Backend.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/Backend.h?rev=329274&r1=329273&r2=329274&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/Backend.h (original)
+++ llvm/trunk/tools/llvm-mca/Backend.h Thu Apr  5 04:36:50 2018
@@ -62,15 +62,15 @@ public:
   Backend(const llvm::MCSubtargetInfo &Subtarget,
           const llvm::MCRegisterInfo &MRI, InstrBuilder &B, SourceMgr &Source,
           unsigned DispatchWidth = 0, unsigned RegisterFileSize = 0,
-          unsigned MaxRetirePerCycle = 0, unsigned LoadQueueSize = 0,
-          unsigned StoreQueueSize = 0, bool AssumeNoAlias = false)
+          unsigned LoadQueueSize = 0, unsigned StoreQueueSize = 0,
+          bool AssumeNoAlias = false)
       : STI(Subtarget), IB(B),
         HWS(llvm::make_unique<Scheduler>(this, Subtarget.getSchedModel(),
                                          LoadQueueSize, StoreQueueSize,
                                          AssumeNoAlias)),
         DU(llvm::make_unique<DispatchUnit>(
             this, STI, MRI, Subtarget.getSchedModel().MicroOpBufferSize,
-            RegisterFileSize, MaxRetirePerCycle, DispatchWidth, HWS.get())),
+            RegisterFileSize, DispatchWidth, HWS.get())),
         SM(Source), Cycles(0) {
     HWS->setDispatchUnit(DU.get());
   }

Modified: llvm/trunk/tools/llvm-mca/Dispatch.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/Dispatch.h?rev=329274&r1=329273&r2=329274&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/Dispatch.h (original)
+++ llvm/trunk/tools/llvm-mca/Dispatch.h Thu Apr  5 04:36:50 2018
@@ -192,9 +192,9 @@ private:
   DispatchUnit *Owner;
 
 public:
-  RetireControlUnit(unsigned NumSlots, unsigned RPC, DispatchUnit *DU)
+  RetireControlUnit(unsigned NumSlots, DispatchUnit *DU)
       : NextAvailableSlotIdx(0), CurrentInstructionSlotIdx(0),
-        AvailableSlots(NumSlots), MaxRetirePerCycle(RPC), Owner(DU) {
+        AvailableSlots(NumSlots), MaxRetirePerCycle(0), Owner(DU) {
     assert(NumSlots && "Expected at least one slot!");
     Queue.resize(NumSlots);
   }
@@ -266,14 +266,13 @@ class DispatchUnit {
 public:
   DispatchUnit(Backend *B, const llvm::MCSubtargetInfo &STI,
                const llvm::MCRegisterInfo &MRI, unsigned MicroOpBufferSize,
-               unsigned RegisterFileSize, unsigned MaxRetirePerCycle,
-               unsigned MaxDispatchWidth, Scheduler *Sched)
+               unsigned RegisterFileSize, unsigned MaxDispatchWidth,
+               Scheduler *Sched)
       : DispatchWidth(MaxDispatchWidth), AvailableEntries(MaxDispatchWidth),
         CarryOver(0U), SC(Sched),
         RAT(llvm::make_unique<RegisterFile>(STI.getSchedModel(), MRI,
                                             RegisterFileSize)),
-        RCU(llvm::make_unique<RetireControlUnit>(MicroOpBufferSize,
-                                                 MaxRetirePerCycle, this)),
+        RCU(llvm::make_unique<RetireControlUnit>(MicroOpBufferSize, this)),
         Owner(B) {}
 
   unsigned getDispatchWidth() const { return DispatchWidth; }

Modified: llvm/trunk/tools/llvm-mca/llvm-mca.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mca/llvm-mca.cpp?rev=329274&r1=329273&r2=329274&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mca/llvm-mca.cpp (original)
+++ llvm/trunk/tools/llvm-mca/llvm-mca.cpp Thu Apr  5 04:36:50 2018
@@ -81,11 +81,6 @@ static cl::opt<unsigned> DispatchWidth(
     cl::desc("Dispatch Width. By default it is set equal to IssueWidth"),
     cl::init(0));
 
-static cl::opt<unsigned> MaxRetirePerCycle(
-    "max-retire-per-cycle",
-    cl::desc("Maximum number of instructions that can be retired in one cycle"),
-    cl::init(0));
-
 static cl::opt<unsigned>
     RegisterFileSize("register-file-size",
                      cl::desc("Maximum number of temporary registers which can "
@@ -361,8 +356,8 @@ int main(int argc, char **argv) {
   }
 
   std::unique_ptr<mca::Backend> B = llvm::make_unique<mca::Backend>(
-      *STI, *MRI, *IB, *S, Width, RegisterFileSize, MaxRetirePerCycle,
-      LoadQueueSize, StoreQueueSize, AssumeNoAlias);
+      *STI, *MRI, *IB, *S, Width, RegisterFileSize, LoadQueueSize,
+      StoreQueueSize, AssumeNoAlias);
 
   std::unique_ptr<mca::BackendPrinter> Printer =
       llvm::make_unique<mca::BackendPrinter>(*B);