[PATCH] D45229: [MI-sched] schedule following instruction latencies

[Sebastian Pop via Phabricator via llvm-commits]

sebpop created this revision.
sebpop added reviewers: atrick, efriedma, evandro, mcrosier.
Herald added subscribers: javed.absar, hiraditya, kristof.beyls, MatzeB.

With this patch LLVM starts scheduling instructions based on their latency.

For top-down scheduling, prefer scheduling instructions at a lower depth:
those instructions will be ready to execute before others at a higher depth.
For bottom-up scheduling, prefer scheduling instructions at a lower height.

For the following testcase:

  void fun(char *restrict in, char *restrict out) {
    *in++ = *out++;
    *in++ = *out++;
    *in++ = *out++;
    *in++ = *out++;
  }

on aarch64 we used to produce this code :

  	ldrb	w8, [x1]
  	strb	w8, [x0]
  	ldrb	w8, [x1, #1]
  	strb	w8, [x0, #1]
  	ldrb	w8, [x1, #2]
  	strb	w8, [x0, #2]
  	ldrb	w8, [x1, #3]
  	strb	w8, [x0, #3]

with the patch we now produce:

  	ldrb	w8, [x1]
  	ldrb	w9, [x1, #1]
  	ldrb	w10, [x1, #2]
  	ldrb	w11, [x1, #3]
  	strb	w8, [x0]
  	strb	w9, [x0, #1]
  	strb	w10, [x0, #2]
  	strb	w11, [x0, #3]

There are about 600 tests modified by this patch (mostly on the x86 side, and a few on aarch64.)


https://reviews.llvm.org/D45229

Files:
  llvm/lib/CodeGen/MachineScheduler.cpp


Index: llvm/lib/CodeGen/MachineScheduler.cpp
===================================================================
--- llvm/lib/CodeGen/MachineScheduler.cpp
+++ llvm/lib/CodeGen/MachineScheduler.cpp
@@ -2969,6 +2969,33 @@
     return;
 
   if (SameBoundary) {
+    // Choose in priority instructions with lower latencies.
+    if (Zone->isTop()) {
+      // Top-down scheduling.
+      unsigned TryDepth = TryCand.SU->getDepth();
+      unsigned Depth = Cand.SU->getDepth();
+
+      // Prefer lowest depth.
+      if (TryDepth > Depth)
+        return;
+
+      // For equal depth, prefer higher height.
+      if (TryDepth == Depth && TryCand.SU->getHeight() < Cand.SU->getHeight())
+        return;
+    } else {
+      // Bottom-up scheduling.
+      unsigned TryHeight = TryCand.SU->getHeight();
+      unsigned Height = Cand.SU->getHeight();
+
+      // Prefer lowest height.
+      if (TryHeight > Height)
+        return;
+
+      // For equal height, prefer higher depth.
+      if (TryHeight == Height && TryCand.SU->getDepth() < Cand.SU->getDepth())
+        return;
+    }
+
     // Avoid critical resource consumption and balance the schedule.
     TryCand.initResourceDelta(DAG, SchedModel);
     if (tryLess(TryCand.ResDelta.CritResources, Cand.ResDelta.CritResources,
@@ -3273,6 +3300,10 @@
                  TryCand, Cand, Cluster))
     return;
 
+  // Choose in priority instructions with lower latencies.
+  if (TryCand.SU->getDepth() > Cand.SU->getDepth())
+    return;
+
   // Avoid critical resource consumption and balance the schedule.
   if (tryLess(TryCand.ResDelta.CritResources, Cand.ResDelta.CritResources,
               TryCand, Cand, ResourceReduce))


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