[llvm] r328930 - [X86] Check if the load and store are to the same pointer before preventing i16 RMW shifts and subtracts from being promoted.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Sat Mar 31 23:29:28 2018
New Revision: 328930

URL: http://llvm.org/viewvc/llvm-project?rev=328930&view=rev
Log:
[X86] Check if the load and store are to the same pointer before preventing i16 RMW shifts and subtracts from being promoted.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/promote-i16.ll
    llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=328930&r1=328929&r2=328930&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Mar 31 23:29:28 2018
@@ -38717,6 +38717,17 @@ bool X86TargetLowering::IsDesirableToPro
   if (VT != MVT::i16)
     return false;
 
+  auto IsFoldableRMW = [](SDValue Load, SDValue Op) {
+    if (!Op.hasOneUse())
+      return false;
+    SDNode *User = *Op->use_begin();
+    if (!ISD::isNormalStore(User))
+      return false;
+    auto *Ld = cast<LoadSDNode>(Load);
+    auto *St = cast<StoreSDNode>(User);
+    return Ld->getBasePtr() == St->getBasePtr();
+  };
+
   bool Commute = false;
   switch (Op.getOpcode()) {
   default: return false;
@@ -38728,7 +38739,7 @@ bool X86TargetLowering::IsDesirableToPro
   case ISD::SRL: {
     SDValue N0 = Op.getOperand(0);
     // Look out for (store (shl (load), x)).
-    if (MayFoldLoad(N0) && MayFoldIntoStore(Op))
+    if (MayFoldLoad(N0) && IsFoldableRMW(N0, Op))
       return false;
     break;
   }
@@ -38744,10 +38755,10 @@ bool X86TargetLowering::IsDesirableToPro
     SDValue N1 = Op.getOperand(1);
     // Avoid disabling potential load folding opportunities.
     if (MayFoldLoad(N1) &&
-        (!Commute || !isa<ConstantSDNode>(N0) || MayFoldIntoStore(Op)))
+        (!Commute || !isa<ConstantSDNode>(N0) || IsFoldableRMW(N1, Op)))
       return false;
     if (MayFoldLoad(N0) &&
-        ((Commute && !isa<ConstantSDNode>(N1)) || MayFoldIntoStore(Op)))
+        ((Commute && !isa<ConstantSDNode>(N1)) || IsFoldableRMW(N0, Op)))
       return false;
   }
   }

Modified: llvm/trunk/test/CodeGen/X86/promote-i16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/promote-i16.ll?rev=328930&r1=328929&r2=328930&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/promote-i16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/promote-i16.ll Sat Mar 31 23:29:28 2018
@@ -71,7 +71,7 @@ define void @bat(i16* %a, i16* %x, i16 s
 ; X64-LABEL: bat:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    movzwl (%rsi), %eax
-; X64-NEXT:    subw %dx, %ax
+; X64-NEXT:    subl %edx, %eax
 ; X64-NEXT:    movw %ax, (%rdi)
 ; X64-NEXT:    retq
 entry:

Modified: llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll?rev=328930&r1=328929&r2=328930&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll Sat Mar 31 23:29:28 2018
@@ -93,14 +93,14 @@ define void @trunc_shl_15_i16_i64(i16* %
 ; SSE2-LABEL: trunc_shl_15_i16_i64:
 ; SSE2:       # %bb.0:
 ; SSE2-NEXT:    movzwl (%rsi), %eax
-; SSE2-NEXT:    shlw $15, %ax
+; SSE2-NEXT:    shll $15, %eax
 ; SSE2-NEXT:    movw %ax, (%rdi)
 ; SSE2-NEXT:    retq
 ;
 ; AVX2-LABEL: trunc_shl_15_i16_i64:
 ; AVX2:       # %bb.0:
 ; AVX2-NEXT:    movzwl (%rsi), %eax
-; AVX2-NEXT:    shlw $15, %ax
+; AVX2-NEXT:    shll $15, %eax
 ; AVX2-NEXT:    movw %ax, (%rdi)
 ; AVX2-NEXT:    retq
   %val = load i64, i64* %in