[PATCH] D44785: Lowering x86 adds/addus/subs/subus intrinsics (llvm part)

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 30 08:48:37 PDT 2018


craig.topper added a comment.

It would need to be additional tests. We need the -upgrade.ll tests to test the AutoUpgrade functionality so they need to keep the old calls.



================
Comment at: lib/Target/X86/X86ISelLowering.cpp:36017
+        isPowerOf2_32(NumElems)))
+    return SDValue();
+
----------------
craig.topper wrote:
> What ensures we don't create X86ISD::ADDS for with a type smaller than 128 bits? For example if VT was v4i8
You probably still need a power of 2 check. And a minimum elements check. I don't think SplitOpsAndApply can handle say a 384-bit vector on AVX2. It will try to split it in 256-bit pieces. But that's  great test case to add.


Repository:
  rL LLVM

https://reviews.llvm.org/D44785





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