[PATCH] D44939: AMDGPU: Dimension-aware image intrinsics

Nicolai Hähnle via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 27 08:30:05 PDT 2018


nhaehnle created this revision.
nhaehnle added reviewers: arsenm, rampitec, b-sumner.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, wdng, kzhuravl.

These new image intrinsics contain the texture type as part of
their name and have each component of the address/coordinate as
individual parameters.

This is a preparatory step for implementing the A16 feature, where
coordinates are passed as half-floats or -ints, but the Z compare
value and texel offsets are still full dwords, making it difficult
or impossible to distinguish between A16 on or off in the old-style
intrinsics.

Additionally, these intrinsics pass the 'texfailpolicy' and
'cachectrl' as i32 bit fields to reduce operand clutter and allow
for future extensibility.

Change-Id: I099f309e0a394082a5901ea196c3967afb867f04


Repository:
  rL LLVM

https://reviews.llvm.org/D44939

Files:
  include/llvm/IR/Intrinsics.td
  include/llvm/IR/IntrinsicsAMDGPU.td
  lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
  lib/Target/AMDGPU/AMDGPUInstrInfo.h
  lib/Target/AMDGPU/AMDGPUSearchableTables.td
  lib/Target/AMDGPU/MIMGInstructions.td
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIInstrInfo.td
  test/Analysis/DivergenceAnalysis/AMDGPU/llvm.amdgcn.image.atomic.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.d16.dim.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.dim.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll

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