[PATCH] D44885: [RISCV] Expand function call to auipc and jalr

[Shiva Chen via Phabricator via llvm-commits]

shiva0217 created this revision.
shiva0217 added reviewers: asb, apazos.
Herald added subscribers: kito-cheng, niosHD, sabuasal, jordy.potman.lists, simoncook, johnrusso, rbar.

To do this:

1. Change GlobalAddress SDNode to TargetGlobalAddress in LowerCall to avoid legalizer split the symbol.

2. Let PseudoCALL match direct call and add PseudoCALLIndirct to match indirect one.

3. Expand PseudoCALL to following form when lower MI to MC: .Ltmp2: auipc ra, %pcrel_hi(func) jalr ra, ra, %pcrel_lo(.Ltmp2)

4. Define shouldForceRelocation to leave R_RISCV_PCREL_HI20 and R_RISCV_PCREL_LO12_I relocation types.


Repository:
  rL LLVM

https://reviews.llvm.org/D44885

Files:
  lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
  lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
  lib/Target/RISCV/RISCVAsmPrinter.cpp
  lib/Target/RISCV/RISCVISelLowering.cpp
  lib/Target/RISCV/RISCVInstrInfo.cpp
  lib/Target/RISCV/RISCVInstrInfo.td
  test/CodeGen/RISCV/alloca.ll
  test/CodeGen/RISCV/analyze-branch.ll
  test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll
  test/CodeGen/RISCV/byval.ll
  test/CodeGen/RISCV/calling-conv-sext-zext.ll
  test/CodeGen/RISCV/calling-conv.ll
  test/CodeGen/RISCV/calls.ll
  test/CodeGen/RISCV/div.ll
  test/CodeGen/RISCV/float-br-fcmp.ll
  test/CodeGen/RISCV/float-mem.ll
  test/CodeGen/RISCV/fp128.ll
  test/CodeGen/RISCV/frame.ll
  test/CodeGen/RISCV/frameaddr-returnaddr.ll
  test/CodeGen/RISCV/mul.ll
  test/CodeGen/RISCV/rem.ll
  test/CodeGen/RISCV/shifts.ll
  test/CodeGen/RISCV/vararg.ll
  test/MC/RISCV/relocations.s

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