[PATCH] D44838: [X86] Correct the placement of ReadAfterLd in BEXTR and BZHI

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: andreadb, atrick, RKSimon.

These instructions have the memory operand before the register operand. So we need to put ReadDefault for all the load ops first. Then the ReadAfterLd


https://reviews.llvm.org/D44838

Files:
  lib/Target/X86/X86InstrInfo.td
  lib/Target/X86/X86ScheduleZnver1.td


Index: lib/Target/X86/X86ScheduleZnver1.td
===================================================================
--- lib/Target/X86/X86ScheduleZnver1.td
+++ lib/Target/X86/X86ScheduleZnver1.td
@@ -569,21 +569,23 @@
 // r,r,r.
 def : InstRW<[WriteALU], (instregex "BEXTR(32|64)rr")>;
 // r,m,r.
-def : InstRW<[WriteALULd, ReadAfterLd], (instregex "BEXTR(32|64)rm")>;
+def : InstRW<[WriteALULd, ReadDefault, ReadDefault, ReadDefault, ReadDefault,
+              ReadDefault, ReadAfterLd], (instregex "BEXTR(32|64)rm")>;
 
 // BZHI.
 // r,r,r.
 def : InstRW<[WriteALU], (instregex "BZHI(32|64)rr")>;
 // r,m,r.
-def : InstRW<[WriteALULd, ReadAfterLd], (instregex "BZHI(32|64)rm")>;
+def : InstRW<[WriteALULd, ReadDefault, ReadDefault, ReadDefault, ReadDefault,
+              ReadDefault, ReadAfterLd], (instregex "BZHI(32|64)rm")>;
 
 // CLD STD.
 def : InstRW<[WriteALU], (instregex "STD", "CLD")>;
 
 // PDEP PEXT.
 // r,r,r.
 def : InstRW<[WriteMicrocoded], (instregex "PDEP(32|64)rr", "PEXT(32|64)rr")>;
-// r,m,r.
+// r,r,m.
 def : InstRW<[WriteMicrocoded], (instregex "PDEP(32|64)rm", "PEXT(32|64)rm")>;
 
 // ROR ROL.
Index: lib/Target/X86/X86InstrInfo.td
===================================================================
--- lib/Target/X86/X86InstrInfo.td
+++ lib/Target/X86/X86InstrInfo.td
@@ -2387,7 +2387,12 @@
              !strconcat(mnemonic, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
              [(set RC:$dst, (Int (ld_frag addr:$src1), RC:$src2)),
               (implicit EFLAGS)], IIC_BIN_MEM>, T8PS, VEX,
-             Sched<[WriteALULd, ReadAfterLd]>;
+             Sched<[WriteALULd,
+                    // x86memop:$src1
+                    ReadDefault, ReadDefault, ReadDefault, ReadDefault,
+                    ReadDefault,
+                    // RC:$src2
+                    ReadAfterLd]>;
 }
 
 let Predicates = [HasBMI], Defs = [EFLAGS] in {


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