[llvm] r327907 - [Hexagon] Add REQUIRES: asserts to test/CodeGen/Hexagon/v6vec_inc1.ll

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Mon Mar 19 14:05:21 2018
New Revision: 327907

URL: http://llvm.org/viewvc/llvm-project?rev=327907&view=rev
Log:
[Hexagon] Add REQUIRES: asserts to test/CodeGen/Hexagon/v6vec_inc1.ll

Modified:
    llvm/trunk/test/CodeGen/Hexagon/v6vec_inc1.ll

Modified: llvm/trunk/test/CodeGen/Hexagon/v6vec_inc1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/v6vec_inc1.ll?rev=327907&r1=327906&r2=327907&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/v6vec_inc1.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/v6vec_inc1.ll Mon Mar 19 14:05:21 2018
@@ -1,5 +1,6 @@
 ; RUN: llc -march=hexagon -O2 -enable-pipeliner=false < %s | FileCheck %s
 ; RUN: llc -march=hexagon -O2 -debug-only=pipeliner < %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-SWP
+; REQUIRES: asserts
 
 ; CHECK: {
 ; CHECK-DAG: v{{[0-9]*}} = vmem(r{{[0-9]*}}++#1)