[llvm] r327807 - [X86][Btver2] Fix crc32 schedule costs
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Mar 18 12:54:43 PDT 2018
Author: rksimon
Date: Sun Mar 18 12:54:42 2018
New Revision: 327807
URL: http://llvm.org/viewvc/llvm-project?rev=327807&view=rev
Log:
[X86][Btver2] Fix crc32 schedule costs
The default is currently FAdd for some reason
Modified:
llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
llvm/trunk/test/CodeGen/X86/sse42-schedule.ll
llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-sse42.s
Modified: llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td?rev=327807&r1=327806&r2=327807&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td Sun Mar 18 12:54:42 2018
@@ -206,6 +206,22 @@ def JWriteIDiv32Ld : SchedWriteRes<[JLAG
def : InstRW<[JWriteIDiv32], (instrs DIV32r, IDIV32r)>;
def : InstRW<[JWriteIDiv32Ld], (instrs DIV32m, IDIV32m)>;
+def JWriteCRC32 : SchedWriteRes<[JALU01]> {
+ let Latency = 3;
+ let ResourceCycles = [4];
+ let NumMicroOps = 3;
+}
+def : InstRW<[JWriteCRC32], (instrs CRC32r32r8, CRC32r32r16, CRC32r32r32,
+ CRC32r64r8, CRC32r64r64)>;
+
+def JWriteCRC32Ld : SchedWriteRes<[JLAGU, JALU01]> {
+ let Latency = 6;
+ let ResourceCycles = [1, 4];
+ let NumMicroOps = 3;
+}
+def : InstRW<[JWriteCRC32Ld], (instrs CRC32r32m8, CRC32r32m16, CRC32r32m32,
+ CRC32r64m8, CRC32r64m64)>;
+
////////////////////////////////////////////////////////////////////////////////
// Integer shifts and rotates.
////////////////////////////////////////////////////////////////////////////////
Modified: llvm/trunk/test/CodeGen/X86/sse42-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse42-schedule.ll?rev=327807&r1=327806&r2=327807&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse42-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse42-schedule.ll Sun Mar 18 12:54:42 2018
@@ -62,8 +62,8 @@ define i32 @crc32_32_8(i32 %a0, i8 %a1,
;
; BTVER2-LABEL: crc32_32_8:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: crc32b %sil, %edi # sched: [3:1.00]
-; BTVER2-NEXT: crc32b (%rdx), %edi # sched: [8:1.00]
+; BTVER2-NEXT: crc32b %sil, %edi # sched: [3:2.00]
+; BTVER2-NEXT: crc32b (%rdx), %edi # sched: [6:2.00]
; BTVER2-NEXT: movl %edi, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
@@ -132,8 +132,8 @@ define i32 @crc32_32_16(i32 %a0, i16 %a1
;
; BTVER2-LABEL: crc32_32_16:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: crc32w %si, %edi # sched: [3:1.00]
-; BTVER2-NEXT: crc32w (%rdx), %edi # sched: [8:1.00]
+; BTVER2-NEXT: crc32w %si, %edi # sched: [3:2.00]
+; BTVER2-NEXT: crc32w (%rdx), %edi # sched: [6:2.00]
; BTVER2-NEXT: movl %edi, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
@@ -202,8 +202,8 @@ define i32 @crc32_32_32(i32 %a0, i32 %a1
;
; BTVER2-LABEL: crc32_32_32:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: crc32l %esi, %edi # sched: [3:1.00]
-; BTVER2-NEXT: crc32l (%rdx), %edi # sched: [8:1.00]
+; BTVER2-NEXT: crc32l %esi, %edi # sched: [3:2.00]
+; BTVER2-NEXT: crc32l (%rdx), %edi # sched: [6:2.00]
; BTVER2-NEXT: movl %edi, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
@@ -272,8 +272,8 @@ define i64 @crc32_64_8(i64 %a0, i8 %a1,
;
; BTVER2-LABEL: crc32_64_8:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: crc32b %sil, %edi # sched: [3:1.00]
-; BTVER2-NEXT: crc32b (%rdx), %edi # sched: [8:1.00]
+; BTVER2-NEXT: crc32b %sil, %edi # sched: [3:2.00]
+; BTVER2-NEXT: crc32b (%rdx), %edi # sched: [6:2.00]
; BTVER2-NEXT: movq %rdi, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
@@ -342,8 +342,8 @@ define i64 @crc32_64_64(i64 %a0, i64 %a1
;
; BTVER2-LABEL: crc32_64_64:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: crc32q %rsi, %rdi # sched: [3:1.00]
-; BTVER2-NEXT: crc32q (%rdx), %rdi # sched: [8:1.00]
+; BTVER2-NEXT: crc32q %rsi, %rdi # sched: [3:2.00]
+; BTVER2-NEXT: crc32q (%rdx), %rdi # sched: [6:2.00]
; BTVER2-NEXT: movq %rdi, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
Modified: llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-sse42.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-sse42.s?rev=327807&r1=327806&r2=327807&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-sse42.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-sse42.s Sun Mar 18 12:54:42 2018
@@ -48,16 +48,16 @@ pcmpgtq (%rax), %xmm2
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions:
-# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - crc32b %al, %ecx
-# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - crc32b (%rax), %ecx
-# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - crc32l %eax, %ecx
-# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - crc32l (%rax), %ecx
-# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - crc32w %ax, %ecx
-# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - crc32w (%rax), %ecx
-# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - crc32b %al, %rcx
-# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - crc32b (%rax), %rcx
-# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - crc32q %rax, %rcx
-# CHECK-NEXT: - - - 1.00 - 1.00 - 1.00 - - - - - - crc32q (%rax), %rcx
+# CHECK-NEXT: - 4.00 - - - - - - - - - - - - crc32b %al, %ecx
+# CHECK-NEXT: 4.00 - - - - - - 1.00 - - - - - - crc32b (%rax), %ecx
+# CHECK-NEXT: - 4.00 - - - - - - - - - - - - crc32l %eax, %ecx
+# CHECK-NEXT: 4.00 - - - - - - 1.00 - - - - - - crc32l (%rax), %ecx
+# CHECK-NEXT: - 4.00 - - - - - - - - - - - - crc32w %ax, %ecx
+# CHECK-NEXT: 4.00 - - - - - - 1.00 - - - - - - crc32w (%rax), %ecx
+# CHECK-NEXT: - 4.00 - - - - - - - - - - - - crc32b %al, %rcx
+# CHECK-NEXT: 4.00 - - - - - - 1.00 - - - - - - crc32b (%rax), %rcx
+# CHECK-NEXT: - 4.00 - - - - - - - - - - - - crc32q %rax, %rcx
+# CHECK-NEXT: 4.00 - - - - - - 1.00 - - - - - - crc32q (%rax), %rcx
# CHECK-NEXT: - - - - - 5.00 10.00 5.00 - - - - - - pcmpestri $1, %xmm0, %xmm2
# CHECK-NEXT: - - - - - 5.00 10.00 6.00 - - - - - - pcmpestri $1, (%rax), %xmm2
# CHECK-NEXT: - - - - - 5.00 10.00 5.00 - - - - - - pcmpestrm $1, %xmm0, %xmm2
@@ -67,4 +67,4 @@ pcmpgtq (%rax), %xmm2
# CHECK-NEXT: - - - - - 2.00 2.00 - - - - - - - pcmpistrm $1, %xmm0, %xmm2
# CHECK-NEXT: - - - - - 2.00 2.00 1.00 - - - - - - pcmpistrm $1, (%rax), %xmm2
# CHECK-NEXT: - - - - - - 1.00 - - - - - 1.00 - pcmpgtq %xmm0, %xmm2
-# CHECK-NEXT: - - - - - 0.01 0.99 1.00 - - - 1.00 - - pcmpgtq (%rax), %xmm2
+# CHECK-NEXT: - - - - - 1.00 - 1.00 - - - 1.00 - - pcmpgtq (%rax), %xmm2
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