[PATCH] D44521: [InstSimplify] fp_binop X, NaN --> NaN

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

In https://reviews.llvm.org/D44521#1040958, @nhaehnle wrote:

> For the AMDGPU imm tests, you could please change the affected ones to operate on i32/i16 instead, so that the result uses v_add_u32? Thanks!
>
> I don't expect this approach to work for the double cases, I think you can just leave those as-is.


Do you mean bitcast back and forth? Example:

  define amdgpu_kernel void @add_inline_imm_neg_1_f32(float addrspace(1)* %out, float %x) {
    %xbc = bitcast float %x to i32
    %y = add i32 %xbc, -1
    %ybc = bitcast i32 %y to float
    store float %ybc, float addrspace(1)* %out
    ret void
  }



  $ llc test/CodeGen/AMDGPU/imm.ll -o - -amdgpu-scalarize-global-loads=false  -march=amdgcn -mcpu=tonga -mattr=-flat-for-global
  ...
  	s_load_dwordx2 s[4:5], s[0:1], 0x24
  	s_load_dword s0, s[0:1], 0x2c
  	s_mov_b32 s7, 0xf000
  	s_mov_b32 s6, -1
  	s_waitcnt lgkmcnt(0)
  	v_add_f32_e64 v0, s0, -1.0
  	buffer_store_dword v0, off, s[4:7], 0
  	s_endpgm


https://reviews.llvm.org/D44521