[llvm] r327789 - [X86][Btver2] Merge equivalent VBLENDVY + VPERMILY schedule groups

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sun Mar 18 03:22:35 PDT 2018


Author: rksimon
Date: Sun Mar 18 03:22:35 2018
New Revision: 327789

URL: http://llvm.org/viewvc/llvm-project?rev=327789&view=rev
Log:
[X86][Btver2] Merge equivalent VBLENDVY + VPERMILY schedule groups

Thanks to Craig Topper for noticing this.

Modified:
    llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td

Modified: llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td?rev=327789&r1=327788&r2=327789&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td Sun Mar 18 03:22:35 2018
@@ -650,14 +650,14 @@ def JWriteVPERMY: SchedWriteRes<[JFPU01]
   let ResourceCycles = [6];
   let NumMicroOps = 6;
 }
-def : InstRW<[JWriteVPERMY], (instrs VPERMILPDYrr, VPERMILPSYrr)>;
+def : InstRW<[JWriteVPERMY], (instrs VBLENDVPDYrr, VBLENDVPSYrr, VPERMILPDYrr, VPERMILPSYrr)>;
 
 def JWriteVPERMYLd: SchedWriteRes<[JLAGU, JFPU01]> {
   let Latency = 8;
   let ResourceCycles = [1, 6];
   let NumMicroOps = 6;
 }
-def : InstRW<[JWriteVPERMYLd, ReadAfterLd], (instrs VPERMILPDYrm, VPERMILPSYrm)>;
+def : InstRW<[JWriteVPERMYLd, ReadAfterLd], (instrs VBLENDVPDYrm, VBLENDVPSYrm, VPERMILPDYrm, VPERMILPSYrm)>;
 
 def JWriteShuffleY: SchedWriteRes<[JFPU01]> {
   let ResourceCycles = [2];
@@ -674,18 +674,6 @@ def JWriteShuffleYLd: SchedWriteRes<[JLA
 def : InstRW<[JWriteShuffleYLd, ReadAfterLd], (instrs VMOVDDUPYrm, VMOVSHDUPYrm, VMOVSLDUPYrm,
                                                       VPERMILPDYmi, VPERMILPSYmi, VSHUFPDYrmi, VSHUFPSYrmi)>;
 
-def JWriteVBlendVPY: SchedWriteRes<[JFPU01]> {
-  let Latency = 3;
-  let ResourceCycles = [6];
-}
-def : InstRW<[JWriteVBlendVPY], (instrs VBLENDVPDYrr, VBLENDVPSYrr, VPERMILPDYrr, VPERMILPSYrr)>;
-
-def JWriteVBlendVPYLd: SchedWriteRes<[JLAGU, JFPU01]> {
-  let Latency = 8;
-  let ResourceCycles = [1, 6];
-}
-def : InstRW<[JWriteVBlendVPYLd, ReadAfterLd], (instrs VBLENDVPDYrm, VBLENDVPSYrm)>;
-
 def JWriteVBROADCASTYLd: SchedWriteRes<[JLAGU, JFPU01]> {
   let Latency = 6;
   let ResourceCycles = [1, 4];




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