[llvm] r327774 - AMDGPU/GlobalISel: Cleanup constant legality

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Sat Mar 17 08:17:48 PDT 2018


Author: arsenm
Date: Sat Mar 17 08:17:48 2018
New Revision: 327774

URL: http://llvm.org/viewvc/llvm-project?rev=327774&view=rev
Log:
AMDGPU/GlobalISel: Cleanup constant legality

Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp?rev=327774&r1=327773&r2=327774&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp Sat Mar 17 08:17:48 2018
@@ -66,18 +66,15 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo
   setAction({G_BITCAST, S32}, Legal);
   setAction({G_BITCAST, 1, V2S16}, Legal);
 
+  getActionDefinitionsBuilder(G_FCONSTANT)
+    .legalFor({S32, S64});
+  getActionDefinitionsBuilder({G_IMPLICIT_DEF, G_CONSTANT})
+    .legalFor({S1, S32, S64});
+
   // FIXME: i1 operands to intrinsics should always be legal, but other i1
   // values may not be legal.  We need to figure out how to distinguish
   // between these two scenarios.
   setAction({G_CONSTANT, S1}, Legal);
-  setAction({G_CONSTANT, S32}, Legal);
-  setAction({G_CONSTANT, S64}, Legal);
-
-  setAction({G_FCONSTANT, S32}, Legal);
-  setAction({G_FCONSTANT, S64}, Legal);
-
-  setAction({G_IMPLICIT_DEF, S32}, Legal);
-  setAction({G_IMPLICIT_DEF, S64}, Legal);
 
   setAction({G_FADD, S32}, Legal);
 

Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir?rev=327774&r1=327773&r2=327774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir Sat Mar 17 08:17:48 2018
@@ -1,94 +1,60 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
 
---- |
-  define void @test_constant_i32() {
-    ret void
-  }
-
-  define void @test_constant_i64() {
-    ret void
-  }
-
-  define void @test_fconstant_f32() {
-    ret void
-  }
-
-  define void @test_fconstant_f64() {
-    ret void
-  }
-
-  declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1
-
-  attributes #1 = { nounwind }
-
-...
-
 ---
 name:            test_constant_i32
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
 body: |
   bb.0:
 
     ; CHECK-LABEL: name: test_constant_i32
     ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
-    ; CHECK: [[C1:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
-    ; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C1]](s1), [[C1]](s1)
-    %0(s32) = G_CONSTANT i32 5
-    %1(s1) = G_CONSTANT i1 0
-    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp.f32), %0, %0, %0, %0, %0, %0, %1, %1;
+    ; CHECK: $vgpr0 = COPY [[C]](s32)
+    %0:_(s32) = G_CONSTANT i32 5
+    $vgpr0 = COPY %0
 ...
 ---
 name:            test_constant_i64
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
 body: |
   bb.0:
 
     ; CHECK-LABEL: name: test_constant_i64
-    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
-    ; CHECK: [[C1:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
-    ; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32), [[C1]](s1), [[C1]](s1)
-    %0(s32) = G_CONSTANT i32 5
-    %1(s1) = G_CONSTANT i1 0
-    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp.f32), %0, %0, %0, %0, %0, %0, %1, %1;
+    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 5
+    ; CHECK: $vgpr0_vgpr1 = COPY [[C]](s64)
+    %0:_(s64) = G_CONSTANT i64 5
+    $vgpr0_vgpr1 = COPY %0
+
 ...
 ---
 name:            test_fconstant_f32
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
 body: |
   bb.0:
 
     ; CHECK-LABEL: name: test_fconstant_f32
     ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
     ; CHECK: $vgpr0 = COPY [[C]](s32)
-    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 7.500000e+00
-    ; CHECK: $vgpr0 = COPY [[C1]](s32)
-    %0(s32) = G_FCONSTANT float 1.0
+    %0:_(s32) = G_FCONSTANT float 1.0
     $vgpr0 = COPY %0
-    %1(s32) = G_FCONSTANT float 7.5
-    $vgpr0 = COPY %1
 ...
 ---
 name:            test_fconstant_f64
-registers:
-  - { id: 0, class: _ }
-  - { id: 1, class: _ }
 body: |
   bb.0:
 
     ; CHECK-LABEL: name: test_fconstant_f64
     ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00
     ; CHECK: $vgpr0_vgpr1 = COPY [[C]](s64)
-    ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 7.500000e+00
-    ; CHECK: $vgpr0_vgpr1 = COPY [[C1]](s64)
-    %0(s64) = G_FCONSTANT double 1.0
+    %0:_(s64) = G_FCONSTANT double 1.0
     $vgpr0_vgpr1 = COPY %0
-    %1(s64) = G_FCONSTANT double 7.5
-    $vgpr0_vgpr1 = COPY %1
+...
+
+---
+name:            test_constant_1
+body: |
+  bb.0:
+
+    ; CHECK-LABEL: name: test_constant_1
+    ; CHECK: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false
+    ; CHECK: S_ENDPGM implicit [[C]](s1)
+    %1:_(s1) = G_CONSTANT i1 0
+    S_ENDPGM implicit %1
 ...




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