[llvm] r327720 - [AMDGPU][MC] Corrected default values for unused SDWA operands

Dmitry Preobrazhensky via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 16 08:40:27 PDT 2018


Modified: llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s?rev=327720&r1=327719&r2=327720&view=diff
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s (original)
+++ llvm/trunk/test/MC/AMDGPU/gfx8_asm_all.s Fri Mar 16 08:40:27 2018
@@ -3837,6 +3837,9 @@ image_load v5, v[1:4], s[12:19] dmask:0x
 image_load v5, v[1:4], s[92:99] dmask:0x1
 // CHECK: [0x00,0x01,0x00,0xf0,0x01,0x05,0x17,0x00]
 
+image_load v5, v[1:4], ttmp[4:11] dmask:0x1
+// CHECK: [0x00,0x01,0x00,0xf0,0x01,0x05,0x1d,0x00]
+
 image_load v5, v[1:4], s[8:15] dmask:0x2
 // CHECK: [0x00,0x02,0x00,0xf0,0x01,0x05,0x02,0x00]
 
@@ -3876,15 +3879,30 @@ image_load v[5:7], v[1:4], s[8:15] dmask
 image_load v[5:7], v[1:4], s[8:15] dmask:0xe
 // CHECK: [0x00,0x0e,0x00,0xf0,0x01,0x05,0x02,0x00]
 
-image_load v[5:8], v[1:4], s[8:15] dmask:0xf
-// CHECK: [0x00,0x0f,0x00,0xf0,0x01,0x05,0x02,0x00]
-
 image_load v5, v[1:4], s[8:15] dmask:0x0
 // CHECK: [0x00,0x00,0x00,0xf0,0x01,0x05,0x02,0x00]
 
 image_load v5, v[1:4], s[8:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x00,0xf0,0x01,0x05,0x02,0x00]
 
+image_load v5, v[1:4], s[8:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0x00,0xf0,0x01,0x05,0x02,0x00]
+
+image_load v5, v[1:4], s[8:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0x00,0xf2,0x01,0x05,0x02,0x00]
+
+image_load v[5:6], v[1:4], s[8:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0x01,0xf0,0x01,0x05,0x02,0x00]
+
+image_load v5, v[1:4], s[8:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0x02,0xf0,0x01,0x05,0x02,0x00]
+
+image_load v5, v[1:4], s[8:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0x00,0xf0,0x01,0x05,0x02,0x00]
+
+image_load v5, v[1:4], s[8:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0x00,0xf0,0x01,0x05,0x02,0x80]
+
 image_load_mip v5, v[1:4], s[8:15] dmask:0x1
 // CHECK: [0x00,0x01,0x04,0xf0,0x01,0x05,0x02,0x00]
 
@@ -3900,6 +3918,9 @@ image_load_mip v5, v[1:4], s[12:19] dmas
 image_load_mip v5, v[1:4], s[92:99] dmask:0x1
 // CHECK: [0x00,0x01,0x04,0xf0,0x01,0x05,0x17,0x00]
 
+image_load_mip v5, v[1:4], ttmp[4:11] dmask:0x1
+// CHECK: [0x00,0x01,0x04,0xf0,0x01,0x05,0x1d,0x00]
+
 image_load_mip v5, v[1:4], s[8:15] dmask:0x2
 // CHECK: [0x00,0x02,0x04,0xf0,0x01,0x05,0x02,0x00]
 
@@ -3939,15 +3960,30 @@ image_load_mip v[5:7], v[1:4], s[8:15] d
 image_load_mip v[5:7], v[1:4], s[8:15] dmask:0xe
 // CHECK: [0x00,0x0e,0x04,0xf0,0x01,0x05,0x02,0x00]
 
-image_load_mip v[5:8], v[1:4], s[8:15] dmask:0xf
-// CHECK: [0x00,0x0f,0x04,0xf0,0x01,0x05,0x02,0x00]
-
 image_load_mip v5, v[1:4], s[8:15] dmask:0x0
 // CHECK: [0x00,0x00,0x04,0xf0,0x01,0x05,0x02,0x00]
 
 image_load_mip v5, v[1:4], s[8:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x04,0xf0,0x01,0x05,0x02,0x00]
 
+image_load_mip v5, v[1:4], s[8:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0x04,0xf0,0x01,0x05,0x02,0x00]
+
+image_load_mip v5, v[1:4], s[8:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0x04,0xf2,0x01,0x05,0x02,0x00]
+
+image_load_mip v[5:6], v[1:4], s[8:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0x05,0xf0,0x01,0x05,0x02,0x00]
+
+image_load_mip v5, v[1:4], s[8:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0x06,0xf0,0x01,0x05,0x02,0x00]
+
+image_load_mip v5, v[1:4], s[8:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0x04,0xf0,0x01,0x05,0x02,0x00]
+
+image_load_mip v5, v[1:4], s[8:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0x04,0xf0,0x01,0x05,0x02,0x80]
+
 image_store v1, v[2:5], s[12:19] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x20,0xf0,0x02,0x01,0x03,0x00]
 
@@ -3963,6 +3999,9 @@ image_store v1, v[2:5], s[16:23] dmask:0
 image_store v1, v[2:5], s[92:99] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x20,0xf0,0x02,0x01,0x17,0x00]
 
+image_store v1, v[2:5], ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x20,0xf0,0x02,0x01,0x1d,0x00]
+
 image_store v1, v[2:5], s[12:19] dmask:0x2 unorm
 // CHECK: [0x00,0x12,0x20,0xf0,0x02,0x01,0x03,0x00]
 
@@ -4011,6 +4050,18 @@ image_store v1, v[2:5], s[12:19] dmask:0
 image_store v1, v[2:5], s[12:19] dmask:0x1 unorm glc
 // CHECK: [0x00,0x31,0x20,0xf0,0x02,0x01,0x03,0x00]
 
+image_store v1, v[2:5], s[12:19] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x20,0xf2,0x02,0x01,0x03,0x00]
+
+image_store v1, v[2:5], s[12:19] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x22,0xf0,0x02,0x01,0x03,0x00]
+
+image_store v1, v[2:5], s[12:19] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x20,0xf0,0x02,0x01,0x03,0x00]
+
+image_store v1, v[2:5], s[12:19] dmask:0x1 unorm d16
+// CHECK: [0x00,0x11,0x20,0xf0,0x02,0x01,0x03,0x80]
+
 image_store_mip v1, v[2:5], s[12:19] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x24,0xf0,0x02,0x01,0x03,0x00]
 
@@ -4026,6 +4077,9 @@ image_store_mip v1, v[2:5], s[16:23] dma
 image_store_mip v1, v[2:5], s[92:99] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x24,0xf0,0x02,0x01,0x17,0x00]
 
+image_store_mip v1, v[2:5], ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x24,0xf0,0x02,0x01,0x1d,0x00]
+
 image_store_mip v1, v[2:5], s[12:19] dmask:0x2 unorm
 // CHECK: [0x00,0x12,0x24,0xf0,0x02,0x01,0x03,0x00]
 
@@ -4074,6 +4128,18 @@ image_store_mip v1, v[2:5], s[12:19] dma
 image_store_mip v1, v[2:5], s[12:19] dmask:0x1 unorm glc
 // CHECK: [0x00,0x31,0x24,0xf0,0x02,0x01,0x03,0x00]
 
+image_store_mip v1, v[2:5], s[12:19] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x24,0xf2,0x02,0x01,0x03,0x00]
+
+image_store_mip v1, v[2:5], s[12:19] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x26,0xf0,0x02,0x01,0x03,0x00]
+
+image_store_mip v1, v[2:5], s[12:19] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x24,0xf0,0x02,0x01,0x03,0x00]
+
+image_store_mip v1, v[2:5], s[12:19] dmask:0x1 unorm d16
+// CHECK: [0x00,0x11,0x24,0xf0,0x02,0x01,0x03,0x80]
+
 image_get_resinfo v5, v[1:4], s[8:15] dmask:0x1
 // CHECK: [0x00,0x01,0x38,0xf0,0x01,0x05,0x02,0x00]
 
@@ -4089,6 +4155,9 @@ image_get_resinfo v5, v[1:4], s[12:19] d
 image_get_resinfo v5, v[1:4], s[92:99] dmask:0x1
 // CHECK: [0x00,0x01,0x38,0xf0,0x01,0x05,0x17,0x00]
 
+image_get_resinfo v5, v[1:4], ttmp[4:11] dmask:0x1
+// CHECK: [0x00,0x01,0x38,0xf0,0x01,0x05,0x1d,0x00]
+
 image_get_resinfo v5, v[1:4], s[8:15] dmask:0x2
 // CHECK: [0x00,0x02,0x38,0xf0,0x01,0x05,0x02,0x00]
 
@@ -4128,15 +4197,456 @@ image_get_resinfo v[5:7], v[1:4], s[8:15
 image_get_resinfo v[5:7], v[1:4], s[8:15] dmask:0xe
 // CHECK: [0x00,0x0e,0x38,0xf0,0x01,0x05,0x02,0x00]
 
-image_get_resinfo v[5:8], v[1:4], s[8:15] dmask:0xf
-// CHECK: [0x00,0x0f,0x38,0xf0,0x01,0x05,0x02,0x00]
-
 image_get_resinfo v5, v[1:4], s[8:15] dmask:0x0
 // CHECK: [0x00,0x00,0x38,0xf0,0x01,0x05,0x02,0x00]
 
 image_get_resinfo v5, v[1:4], s[8:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x38,0xf0,0x01,0x05,0x02,0x00]
 
+image_get_resinfo v5, v[1:4], s[8:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0x38,0xf0,0x01,0x05,0x02,0x00]
+
+image_get_resinfo v5, v[1:4], s[8:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0x38,0xf2,0x01,0x05,0x02,0x00]
+
+image_get_resinfo v[5:6], v[1:4], s[8:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0x39,0xf0,0x01,0x05,0x02,0x00]
+
+image_get_resinfo v5, v[1:4], s[8:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0x3a,0xf0,0x01,0x05,0x02,0x00]
+
+image_get_resinfo v5, v[1:4], s[8:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0x38,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_swap v5, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x40,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_swap v252, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x40,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_swap v5, v255, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x40,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_swap v5, v1, s[12:19] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x40,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_swap v5, v1, s[92:99] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x40,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_swap v5, v1, ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x40,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_swap v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x40,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_swap v5, v1, s[8:15] dmask:0x1 unorm glc
+// CHECK: [0x00,0x31,0x40,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_swap v5, v1, s[8:15] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x40,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_swap v5, v1, s[8:15] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x42,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_swap v5, v1, s[8:15] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x40,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_cmpswap v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x44,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_cmpswap v[252:253], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x44,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_cmpswap v[5:6], v255, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x44,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_cmpswap v[5:6], v1, s[12:19] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x44,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_cmpswap v[5:6], v1, s[92:99] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x44,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_cmpswap v[5:6], v1, ttmp[4:11] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x44,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_cmpswap v[5:8], v1, s[8:15] dmask:0xf unorm
+// CHECK: [0x00,0x1f,0x44,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_cmpswap v[5:6], v1, s[8:15] dmask:0x3 unorm glc
+// CHECK: [0x00,0x33,0x44,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_cmpswap v[5:6], v1, s[8:15] dmask:0x3 unorm slc
+// CHECK: [0x00,0x13,0x44,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_cmpswap v[5:6], v1, s[8:15] dmask:0x3 unorm lwe
+// CHECK: [0x00,0x13,0x46,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_cmpswap v[5:6], v1, s[8:15] dmask:0x3 unorm da
+// CHECK: [0x00,0x53,0x44,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_add v5, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x48,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_add v252, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x48,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_add v5, v255, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x48,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_add v5, v1, s[12:19] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x48,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_add v5, v1, s[92:99] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x48,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_add v5, v1, ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x48,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_add v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x48,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_add v5, v1, s[8:15] dmask:0x1 unorm glc
+// CHECK: [0x00,0x31,0x48,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_add v5, v1, s[8:15] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x48,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_add v5, v1, s[8:15] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x4a,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_add v5, v1, s[8:15] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x48,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_sub v5, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x4c,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_sub v252, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x4c,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_sub v5, v255, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x4c,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_sub v5, v1, s[12:19] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x4c,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_sub v5, v1, s[92:99] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x4c,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_sub v5, v1, ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x4c,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_sub v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x4c,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_sub v5, v1, s[8:15] dmask:0x1 unorm glc
+// CHECK: [0x00,0x31,0x4c,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_sub v5, v1, s[8:15] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x4c,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_sub v5, v1, s[8:15] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x4e,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_sub v5, v1, s[8:15] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x4c,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_smin v5, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x50,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_smin v252, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x50,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_smin v5, v255, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x50,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_smin v5, v1, s[12:19] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x50,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_smin v5, v1, s[92:99] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x50,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_smin v5, v1, ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x50,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_smin v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x50,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_smin v5, v1, s[8:15] dmask:0x1 unorm glc
+// CHECK: [0x00,0x31,0x50,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_smin v5, v1, s[8:15] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x50,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_smin v5, v1, s[8:15] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x52,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_smin v5, v1, s[8:15] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x50,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_umin v5, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x54,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_umin v252, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x54,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_umin v5, v255, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x54,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_umin v5, v1, s[12:19] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x54,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_umin v5, v1, s[92:99] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x54,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_umin v5, v1, ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x54,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_umin v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x54,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_umin v5, v1, s[8:15] dmask:0x1 unorm glc
+// CHECK: [0x00,0x31,0x54,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_umin v5, v1, s[8:15] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x54,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_umin v5, v1, s[8:15] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x56,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_umin v5, v1, s[8:15] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x54,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_smax v5, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x58,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_smax v252, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x58,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_smax v5, v255, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x58,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_smax v5, v1, s[12:19] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x58,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_smax v5, v1, s[92:99] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x58,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_smax v5, v1, ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x58,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_smax v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x58,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_smax v5, v1, s[8:15] dmask:0x1 unorm glc
+// CHECK: [0x00,0x31,0x58,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_smax v5, v1, s[8:15] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x58,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_smax v5, v1, s[8:15] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x5a,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_smax v5, v1, s[8:15] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x58,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_umax v5, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x5c,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_umax v252, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x5c,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_umax v5, v255, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x5c,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_umax v5, v1, s[12:19] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x5c,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_umax v5, v1, s[92:99] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x5c,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_umax v5, v1, ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x5c,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_umax v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x5c,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_umax v5, v1, s[8:15] dmask:0x1 unorm glc
+// CHECK: [0x00,0x31,0x5c,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_umax v5, v1, s[8:15] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x5c,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_umax v5, v1, s[8:15] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x5e,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_umax v5, v1, s[8:15] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x5c,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_and v5, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x60,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_and v252, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x60,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_and v5, v255, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x60,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_and v5, v1, s[12:19] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x60,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_and v5, v1, s[92:99] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x60,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_and v5, v1, ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x60,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_and v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x60,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_and v5, v1, s[8:15] dmask:0x1 unorm glc
+// CHECK: [0x00,0x31,0x60,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_and v5, v1, s[8:15] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x60,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_and v5, v1, s[8:15] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x62,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_and v5, v1, s[8:15] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x60,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_or v5, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x64,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_or v252, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x64,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_or v5, v255, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x64,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_or v5, v1, s[12:19] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x64,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_or v5, v1, s[92:99] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x64,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_or v5, v1, ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x64,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_or v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x64,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_or v5, v1, s[8:15] dmask:0x1 unorm glc
+// CHECK: [0x00,0x31,0x64,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_or v5, v1, s[8:15] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x64,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_or v5, v1, s[8:15] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x66,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_or v5, v1, s[8:15] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x64,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_xor v5, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x68,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_xor v252, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x68,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_xor v5, v255, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x68,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_xor v5, v1, s[12:19] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x68,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_xor v5, v1, s[92:99] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x68,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_xor v5, v1, ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x68,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_xor v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x68,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_xor v5, v1, s[8:15] dmask:0x1 unorm glc
+// CHECK: [0x00,0x31,0x68,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_xor v5, v1, s[8:15] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x68,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_xor v5, v1, s[8:15] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x6a,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_xor v5, v1, s[8:15] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x68,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_inc v5, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x6c,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_inc v252, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x6c,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_inc v5, v255, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x6c,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_inc v5, v1, s[12:19] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x6c,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_inc v5, v1, s[92:99] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x6c,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_inc v5, v1, ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x6c,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_inc v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x6c,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_inc v5, v1, s[8:15] dmask:0x1 unorm glc
+// CHECK: [0x00,0x31,0x6c,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_inc v5, v1, s[8:15] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x6c,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_inc v5, v1, s[8:15] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x6e,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_inc v5, v1, s[8:15] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x6c,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_dec v5, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x70,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_dec v252, v1, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x70,0xf0,0x01,0xfc,0x02,0x00]
+
+image_atomic_dec v5, v255, s[8:15] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x70,0xf0,0xff,0x05,0x02,0x00]
+
+image_atomic_dec v5, v1, s[12:19] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x70,0xf0,0x01,0x05,0x03,0x00]
+
+image_atomic_dec v5, v1, s[92:99] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x70,0xf0,0x01,0x05,0x17,0x00]
+
+image_atomic_dec v5, v1, ttmp[4:11] dmask:0x1 unorm
+// CHECK: [0x00,0x11,0x70,0xf0,0x01,0x05,0x1d,0x00]
+
+image_atomic_dec v[5:6], v1, s[8:15] dmask:0x3 unorm
+// CHECK: [0x00,0x13,0x70,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_dec v5, v1, s[8:15] dmask:0x1 unorm glc
+// CHECK: [0x00,0x31,0x70,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_dec v5, v1, s[8:15] dmask:0x1 unorm slc
+// CHECK: [0x00,0x11,0x70,0xf2,0x01,0x05,0x02,0x00]
+
+image_atomic_dec v5, v1, s[8:15] dmask:0x1 unorm lwe
+// CHECK: [0x00,0x11,0x72,0xf0,0x01,0x05,0x02,0x00]
+
+image_atomic_dec v5, v1, s[8:15] dmask:0x1 unorm da
+// CHECK: [0x00,0x51,0x70,0xf0,0x01,0x05,0x02,0x00]
+
 image_sample v5, v[1:4], s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x80,0xf0,0x01,0x05,0x62,0x00]
 
@@ -4152,6 +4662,9 @@ image_sample v5, v[1:4], s[12:19], s[12:
 image_sample v5, v[1:4], s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x80,0xf0,0x01,0x05,0x77,0x00]
 
+image_sample v5, v[1:4], ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0x80,0xf0,0x01,0x05,0x7d,0x00]
+
 image_sample v5, v[1:4], s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0x80,0xf0,0x01,0x05,0x82,0x00]
 
@@ -4200,15 +4713,30 @@ image_sample v[5:7], v[1:4], s[8:15], s[
 image_sample v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0x80,0xf0,0x01,0x05,0x62,0x00]
 
-image_sample v[5:8], v[1:4], s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0x80,0xf0,0x01,0x05,0x62,0x00]
-
 image_sample v5, v[1:4], s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0x80,0xf0,0x01,0x05,0x62,0x00]
 
 image_sample v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x80,0xf0,0x01,0x05,0x62,0x00]
 
+image_sample v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0x80,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0x80,0xf2,0x01,0x05,0x62,0x00]
+
+image_sample v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0x81,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0x82,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0x80,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0x80,0xf0,0x01,0x05,0x62,0x80]
+
 image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x84,0xf0,0x01,0x05,0x62,0x00]
 
@@ -4224,6 +4752,9 @@ image_sample_cl v5, v[1:4], s[12:19], s[
 image_sample_cl v5, v[1:4], s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x84,0xf0,0x01,0x05,0x77,0x00]
 
+image_sample_cl v5, v[1:4], ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0x84,0xf0,0x01,0x05,0x7d,0x00]
+
 image_sample_cl v5, v[1:4], s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0x84,0xf0,0x01,0x05,0x82,0x00]
 
@@ -4272,15 +4803,30 @@ image_sample_cl v[5:7], v[1:4], s[8:15],
 image_sample_cl v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0x84,0xf0,0x01,0x05,0x62,0x00]
 
-image_sample_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0x84,0xf0,0x01,0x05,0x62,0x00]
-
 image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0x84,0xf0,0x01,0x05,0x62,0x00]
 
 image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x84,0xf0,0x01,0x05,0x62,0x00]
 
+image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0x84,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0x84,0xf2,0x01,0x05,0x62,0x00]
+
+image_sample_cl v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0x85,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0x86,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0x84,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0x84,0xf0,0x01,0x05,0x62,0x80]
+
 image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x90,0xf0,0x01,0x05,0x62,0x00]
 
@@ -4296,6 +4842,9 @@ image_sample_l v5, v[1:4], s[12:19], s[1
 image_sample_l v5, v[1:4], s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x90,0xf0,0x01,0x05,0x77,0x00]
 
+image_sample_l v5, v[1:4], ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0x90,0xf0,0x01,0x05,0x7d,0x00]
+
 image_sample_l v5, v[1:4], s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0x90,0xf0,0x01,0x05,0x82,0x00]
 
@@ -4344,15 +4893,30 @@ image_sample_l v[5:7], v[1:4], s[8:15],
 image_sample_l v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0x90,0xf0,0x01,0x05,0x62,0x00]
 
-image_sample_l v[5:8], v[1:4], s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0x90,0xf0,0x01,0x05,0x62,0x00]
-
 image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0x90,0xf0,0x01,0x05,0x62,0x00]
 
 image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x90,0xf0,0x01,0x05,0x62,0x00]
 
+image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0x90,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0x90,0xf2,0x01,0x05,0x62,0x00]
+
+image_sample_l v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0x91,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0x92,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0x90,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0x90,0xf0,0x01,0x05,0x62,0x80]
+
 image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x94,0xf0,0x01,0x05,0x62,0x00]
 
@@ -4368,6 +4932,9 @@ image_sample_b v5, v[1:4], s[12:19], s[1
 image_sample_b v5, v[1:4], s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x94,0xf0,0x01,0x05,0x77,0x00]
 
+image_sample_b v5, v[1:4], ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0x94,0xf0,0x01,0x05,0x7d,0x00]
+
 image_sample_b v5, v[1:4], s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0x94,0xf0,0x01,0x05,0x82,0x00]
 
@@ -4416,15 +4983,30 @@ image_sample_b v[5:7], v[1:4], s[8:15],
 image_sample_b v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0x94,0xf0,0x01,0x05,0x62,0x00]
 
-image_sample_b v[5:8], v[1:4], s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0x94,0xf0,0x01,0x05,0x62,0x00]
-
 image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0x94,0xf0,0x01,0x05,0x62,0x00]
 
 image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x94,0xf0,0x01,0x05,0x62,0x00]
 
+image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0x94,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0x94,0xf2,0x01,0x05,0x62,0x00]
+
+image_sample_b v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0x95,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0x96,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0x94,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0x94,0xf0,0x01,0x05,0x62,0x80]
+
 image_sample_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x98,0xf0,0x01,0x05,0x62,0x00]
 
@@ -4440,6 +5022,9 @@ image_sample_b_cl v5, v[1:4], s[12:19],
 image_sample_b_cl v5, v[1:4], s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x98,0xf0,0x01,0x05,0x77,0x00]
 
+image_sample_b_cl v5, v[1:4], ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0x98,0xf0,0x01,0x05,0x7d,0x00]
+
 image_sample_b_cl v5, v[1:4], s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0x98,0xf0,0x01,0x05,0x82,0x00]
 
@@ -4488,15 +5073,30 @@ image_sample_b_cl v[5:7], v[1:4], s[8:15
 image_sample_b_cl v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0x98,0xf0,0x01,0x05,0x62,0x00]
 
-image_sample_b_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0x98,0xf0,0x01,0x05,0x62,0x00]
-
 image_sample_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0x98,0xf0,0x01,0x05,0x62,0x00]
 
 image_sample_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x98,0xf0,0x01,0x05,0x62,0x00]
 
+image_sample_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0x98,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0x98,0xf2,0x01,0x05,0x62,0x00]
+
+image_sample_b_cl v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0x99,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0x9a,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0x98,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0x98,0xf0,0x01,0x05,0x62,0x80]
+
 image_sample_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x9c,0xf0,0x01,0x05,0x62,0x00]
 
@@ -4512,6 +5112,9 @@ image_sample_lz v5, v[1:4], s[12:19], s[
 image_sample_lz v5, v[1:4], s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x9c,0xf0,0x01,0x05,0x77,0x00]
 
+image_sample_lz v5, v[1:4], ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0x9c,0xf0,0x01,0x05,0x7d,0x00]
+
 image_sample_lz v5, v[1:4], s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0x9c,0xf0,0x01,0x05,0x82,0x00]
 
@@ -4560,15 +5163,30 @@ image_sample_lz v[5:7], v[1:4], s[8:15],
 image_sample_lz v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0x9c,0xf0,0x01,0x05,0x62,0x00]
 
-image_sample_lz v[5:8], v[1:4], s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0x9c,0xf0,0x01,0x05,0x62,0x00]
-
 image_sample_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0x9c,0xf0,0x01,0x05,0x62,0x00]
 
 image_sample_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x9c,0xf0,0x01,0x05,0x62,0x00]
 
+image_sample_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0x9c,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0x9c,0xf2,0x01,0x05,0x62,0x00]
+
+image_sample_lz v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0x9d,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0x9e,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0x9c,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0x9c,0xf0,0x01,0x05,0x62,0x80]
+
 image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0xa0,0xf0,0x01,0x05,0x62,0x00]
 
@@ -4584,6 +5202,9 @@ image_sample_c v5, v[1:4], s[12:19], s[1
 image_sample_c v5, v[1:4], s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0xa0,0xf0,0x01,0x05,0x77,0x00]
 
+image_sample_c v5, v[1:4], ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0xa0,0xf0,0x01,0x05,0x7d,0x00]
+
 image_sample_c v5, v[1:4], s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0xa0,0xf0,0x01,0x05,0x82,0x00]
 
@@ -4632,15 +5253,30 @@ image_sample_c v[5:7], v[1:4], s[8:15],
 image_sample_c v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0xa0,0xf0,0x01,0x05,0x62,0x00]
 
-image_sample_c v[5:8], v[1:4], s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0xa0,0xf0,0x01,0x05,0x62,0x00]
-
 image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0xa0,0xf0,0x01,0x05,0x62,0x00]
 
 image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0xa0,0xf0,0x01,0x05,0x62,0x00]
 
+image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0xa0,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0xa0,0xf2,0x01,0x05,0x62,0x00]
+
+image_sample_c v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0xa1,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0xa2,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0xa0,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0xa0,0xf0,0x01,0x05,0x62,0x80]
+
 image_sample_c_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0xa4,0xf0,0x01,0x05,0x62,0x00]
 
@@ -4656,6 +5292,9 @@ image_sample_c_cl v5, v[1:4], s[12:19],
 image_sample_c_cl v5, v[1:4], s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0xa4,0xf0,0x01,0x05,0x77,0x00]
 
+image_sample_c_cl v5, v[1:4], ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0xa4,0xf0,0x01,0x05,0x7d,0x00]
+
 image_sample_c_cl v5, v[1:4], s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0xa4,0xf0,0x01,0x05,0x82,0x00]
 
@@ -4704,15 +5343,30 @@ image_sample_c_cl v[5:7], v[1:4], s[8:15
 image_sample_c_cl v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0xa4,0xf0,0x01,0x05,0x62,0x00]
 
-image_sample_c_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0xa4,0xf0,0x01,0x05,0x62,0x00]
-
 image_sample_c_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0xa4,0xf0,0x01,0x05,0x62,0x00]
 
 image_sample_c_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0xa4,0xf0,0x01,0x05,0x62,0x00]
 
+image_sample_c_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0xa4,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0xa4,0xf2,0x01,0x05,0x62,0x00]
+
+image_sample_c_cl v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0xa5,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0xa6,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0xa4,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0xa4,0xf0,0x01,0x05,0x62,0x80]
+
 image_sample_c_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0xb0,0xf0,0x01,0x05,0x62,0x00]
 
@@ -4728,6 +5382,9 @@ image_sample_c_l v5, v[1:4], s[12:19], s
 image_sample_c_l v5, v[1:4], s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0xb0,0xf0,0x01,0x05,0x77,0x00]
 
+image_sample_c_l v5, v[1:4], ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0xb0,0xf0,0x01,0x05,0x7d,0x00]
+
 image_sample_c_l v5, v[1:4], s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0xb0,0xf0,0x01,0x05,0x82,0x00]
 
@@ -4776,15 +5433,30 @@ image_sample_c_l v[5:7], v[1:4], s[8:15]
 image_sample_c_l v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0xb0,0xf0,0x01,0x05,0x62,0x00]
 
-image_sample_c_l v[5:8], v[1:4], s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0xb0,0xf0,0x01,0x05,0x62,0x00]
-
 image_sample_c_l v5, v[1:4], s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0xb0,0xf0,0x01,0x05,0x62,0x00]
 
 image_sample_c_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0xb0,0xf0,0x01,0x05,0x62,0x00]
 
+image_sample_c_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0xb0,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0xb0,0xf2,0x01,0x05,0x62,0x00]
+
+image_sample_c_l v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0xb1,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0xb2,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0xb0,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0xb0,0xf0,0x01,0x05,0x62,0x80]
+
 image_sample_c_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0xb4,0xf0,0x01,0x05,0x62,0x00]
 
@@ -4800,6 +5472,9 @@ image_sample_c_b v5, v[1:4], s[12:19], s
 image_sample_c_b v5, v[1:4], s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0xb4,0xf0,0x01,0x05,0x77,0x00]
 
+image_sample_c_b v5, v[1:4], ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0xb4,0xf0,0x01,0x05,0x7d,0x00]
+
 image_sample_c_b v5, v[1:4], s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0xb4,0xf0,0x01,0x05,0x82,0x00]
 
@@ -4848,15 +5523,30 @@ image_sample_c_b v[5:7], v[1:4], s[8:15]
 image_sample_c_b v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0xb4,0xf0,0x01,0x05,0x62,0x00]
 
-image_sample_c_b v[5:8], v[1:4], s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0xb4,0xf0,0x01,0x05,0x62,0x00]
-
 image_sample_c_b v5, v[1:4], s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0xb4,0xf0,0x01,0x05,0x62,0x00]
 
 image_sample_c_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0xb4,0xf0,0x01,0x05,0x62,0x00]
 
+image_sample_c_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0xb4,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0xb4,0xf2,0x01,0x05,0x62,0x00]
+
+image_sample_c_b v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0xb5,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0xb6,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0xb4,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0xb4,0xf0,0x01,0x05,0x62,0x80]
+
 image_sample_c_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0xb8,0xf0,0x01,0x05,0x62,0x00]
 
@@ -4872,6 +5562,9 @@ image_sample_c_b_cl v5, v[1:4], s[12:19]
 image_sample_c_b_cl v5, v[1:4], s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0xb8,0xf0,0x01,0x05,0x77,0x00]
 
+image_sample_c_b_cl v5, v[1:4], ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0xb8,0xf0,0x01,0x05,0x7d,0x00]
+
 image_sample_c_b_cl v5, v[1:4], s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0xb8,0xf0,0x01,0x05,0x82,0x00]
 
@@ -4920,15 +5613,30 @@ image_sample_c_b_cl v[5:7], v[1:4], s[8:
 image_sample_c_b_cl v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0xb8,0xf0,0x01,0x05,0x62,0x00]
 
-image_sample_c_b_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0xb8,0xf0,0x01,0x05,0x62,0x00]
-
 image_sample_c_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0xb8,0xf0,0x01,0x05,0x62,0x00]
 
 image_sample_c_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0xb8,0xf0,0x01,0x05,0x62,0x00]
 
+image_sample_c_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0xb8,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0xb8,0xf2,0x01,0x05,0x62,0x00]
+
+image_sample_c_b_cl v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0xb9,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0xba,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0xb8,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_b_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0xb8,0xf0,0x01,0x05,0x62,0x80]
+
 image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0xbc,0xf0,0x01,0x05,0x62,0x00]
 
@@ -4944,6 +5652,9 @@ image_sample_c_lz v5, v[1:4], s[12:19],
 image_sample_c_lz v5, v[1:4], s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0xbc,0xf0,0x01,0x05,0x77,0x00]
 
+image_sample_c_lz v5, v[1:4], ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0xbc,0xf0,0x01,0x05,0x7d,0x00]
+
 image_sample_c_lz v5, v[1:4], s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0xbc,0xf0,0x01,0x05,0x82,0x00]
 
@@ -4992,15 +5703,30 @@ image_sample_c_lz v[5:7], v[1:4], s[8:15
 image_sample_c_lz v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0xbc,0xf0,0x01,0x05,0x62,0x00]
 
-image_sample_c_lz v[5:8], v[1:4], s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0xbc,0xf0,0x01,0x05,0x62,0x00]
-
 image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0xbc,0xf0,0x01,0x05,0x62,0x00]
 
 image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0xbc,0xf0,0x01,0x05,0x62,0x00]
 
+image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0xbc,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0xbc,0xf2,0x01,0x05,0x62,0x00]
+
+image_sample_c_lz v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0xbd,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0xbe,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0xbc,0xf0,0x01,0x05,0x62,0x00]
+
+image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
+// CHECK: [0x00,0x01,0xbc,0xf0,0x01,0x05,0x62,0x80]
+
 image_gather4 v[5:8], v1, s[8:15], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x00,0xf1,0x01,0x05,0x62,0x00]
 
@@ -6312,6 +7038,9 @@ image_get_lod v5, v1, s[12:19], s[12:15]
 image_get_lod v5, v1, s[92:99], s[12:15] dmask:0x1
 // CHECK: [0x00,0x01,0x80,0xf1,0x01,0x05,0x77,0x00]
 
+image_get_lod v5, v1, ttmp[4:11], s[12:15] dmask:0x1
+// CHECK: [0x00,0x01,0x80,0xf1,0x01,0x05,0x7d,0x00]
+
 image_get_lod v5, v1, s[8:15], s[16:19] dmask:0x1
 // CHECK: [0x00,0x01,0x80,0xf1,0x01,0x05,0x82,0x00]
 
@@ -6360,15 +7089,27 @@ image_get_lod v[5:7], v1, s[8:15], s[12:
 image_get_lod v[5:7], v1, s[8:15], s[12:15] dmask:0xe
 // CHECK: [0x00,0x0e,0x80,0xf1,0x01,0x05,0x62,0x00]
 
-image_get_lod v[5:8], v1, s[8:15], s[12:15] dmask:0xf
-// CHECK: [0x00,0x0f,0x80,0xf1,0x01,0x05,0x62,0x00]
-
 image_get_lod v5, v1, s[8:15], s[12:15] dmask:0x0
 // CHECK: [0x00,0x00,0x80,0xf1,0x01,0x05,0x62,0x00]
 
 image_get_lod v5, v1, s[8:15], s[12:15] dmask:0x1 unorm
 // CHECK: [0x00,0x11,0x80,0xf1,0x01,0x05,0x62,0x00]
 
+image_get_lod v5, v1, s[8:15], s[12:15] dmask:0x1 glc
+// CHECK: [0x00,0x21,0x80,0xf1,0x01,0x05,0x62,0x00]
+
+image_get_lod v5, v1, s[8:15], s[12:15] dmask:0x1 slc
+// CHECK: [0x00,0x01,0x80,0xf3,0x01,0x05,0x62,0x00]
+
+image_get_lod v[5:6], v1, s[8:15], s[12:15] dmask:0x1 tfe
+// CHECK: [0x00,0x01,0x81,0xf1,0x01,0x05,0x62,0x00]
+
+image_get_lod v5, v1, s[8:15], s[12:15] dmask:0x1 lwe
+// CHECK: [0x00,0x01,0x82,0xf1,0x01,0x05,0x62,0x00]
+
+image_get_lod v5, v1, s[8:15], s[12:15] dmask:0x1 da
+// CHECK: [0x00,0x41,0x80,0xf1,0x01,0x05,0x62,0x00]
+
 buffer_load_format_x v5, off, s[8:11], s3 offset:4095
 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03]
 
@@ -6423,6 +7164,9 @@ buffer_load_format_x v5, off, s[8:11], s
 buffer_load_format_x v5, off, s[8:11], s3 offset:4095 slc
 // CHECK: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03]
 
+buffer_load_format_x v5, off, s[8:11], s3 offset:4095 lds
+// CHECK: [0xff,0x0f,0x01,0xe0,0x00,0x05,0x02,0x03]
+
 buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095
 // CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03]
 
@@ -6801,6 +7545,438 @@ buffer_store_format_xyzw v[1:4], off, s[
 buffer_store_format_xyzw v[1:4], off, s[12:15], s4 offset:4095 slc
 // CHECK: [0xff,0x0f,0x1e,0xe0,0x00,0x01,0x03,0x04]
 
+buffer_load_format_d16_x v5, off, s[8:11], s3 offset:4095
+// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_x v255, off, s[8:11], s3 offset:4095
+// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0xff,0x02,0x03]
+
+buffer_load_format_d16_x v5, off, s[12:15], s3 offset:4095
+// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x03,0x03]
+
+buffer_load_format_d16_x v5, off, s[96:99], s3 offset:4095
+// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x18,0x03]
+
+buffer_load_format_d16_x v5, off, ttmp[8:11], s3 offset:4095
+// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x1e,0x03]
+
+buffer_load_format_d16_x v5, off, s[8:11], s101 offset:4095
+// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0x65]
+
+buffer_load_format_d16_x v5, off, s[8:11], m0 offset:4095
+// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0x7c]
+
+buffer_load_format_d16_x v5, off, s[8:11], 0 offset:4095
+// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0x80]
+
+buffer_load_format_d16_x v5, off, s[8:11], -1 offset:4095
+// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0xc1]
+
+buffer_load_format_d16_x v5, off, s[8:11], 0.5 offset:4095
+// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0xf0]
+
+buffer_load_format_d16_x v5, off, s[8:11], -4.0 offset:4095
+// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0xf7]
+
+buffer_load_format_d16_x v5, v0, s[8:11], s3 idxen offset:4095
+// CHECK: [0xff,0x2f,0x20,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_x v5, v0, s[8:11], s3 offen offset:4095
+// CHECK: [0xff,0x1f,0x20,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_x v5, off, s[8:11], s3
+// CHECK: [0x00,0x00,0x20,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_x v5, off, s[8:11], s3 offset:0
+// CHECK: [0x00,0x00,0x20,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_x v5, off, s[8:11], s3 offset:7
+// CHECK: [0x07,0x00,0x20,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_x v5, off, s[8:11], s3 offset:4095 glc
+// CHECK: [0xff,0x4f,0x20,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_x v5, off, s[8:11], s3 offset:4095 slc
+// CHECK: [0xff,0x0f,0x22,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xy v[5:6], off, s[8:11], s3 offset:4095
+// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xy v[254:255], off, s[8:11], s3 offset:4095
+// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0xfe,0x02,0x03]
+
+buffer_load_format_d16_xy v[5:6], off, s[12:15], s3 offset:4095
+// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x03,0x03]
+
+buffer_load_format_d16_xy v[5:6], off, s[96:99], s3 offset:4095
+// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x18,0x03]
+
+buffer_load_format_d16_xy v[5:6], off, ttmp[8:11], s3 offset:4095
+// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x1e,0x03]
+
+buffer_load_format_d16_xy v[5:6], off, s[8:11], s101 offset:4095
+// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0x65]
+
+buffer_load_format_d16_xy v[5:6], off, s[8:11], m0 offset:4095
+// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0x7c]
+
+buffer_load_format_d16_xy v[5:6], off, s[8:11], 0 offset:4095
+// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0x80]
+
+buffer_load_format_d16_xy v[5:6], off, s[8:11], -1 offset:4095
+// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0xc1]
+
+buffer_load_format_d16_xy v[5:6], off, s[8:11], 0.5 offset:4095
+// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0xf0]
+
+buffer_load_format_d16_xy v[5:6], off, s[8:11], -4.0 offset:4095
+// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0xf7]
+
+buffer_load_format_d16_xy v[5:6], v0, s[8:11], s3 idxen offset:4095
+// CHECK: [0xff,0x2f,0x24,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xy v[5:6], v0, s[8:11], s3 offen offset:4095
+// CHECK: [0xff,0x1f,0x24,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xy v[5:6], off, s[8:11], s3
+// CHECK: [0x00,0x00,0x24,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xy v[5:6], off, s[8:11], s3 offset:0
+// CHECK: [0x00,0x00,0x24,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xy v[5:6], off, s[8:11], s3 offset:7
+// CHECK: [0x07,0x00,0x24,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xy v[5:6], off, s[8:11], s3 offset:4095 glc
+// CHECK: [0xff,0x4f,0x24,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xy v[5:6], off, s[8:11], s3 offset:4095 slc
+// CHECK: [0xff,0x0f,0x26,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyz v[5:7], off, s[8:11], s3 offset:4095
+// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyz v[253:255], off, s[8:11], s3 offset:4095
+// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0xfd,0x02,0x03]
+
+buffer_load_format_d16_xyz v[5:7], off, s[12:15], s3 offset:4095
+// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x03,0x03]
+
+buffer_load_format_d16_xyz v[5:7], off, s[96:99], s3 offset:4095
+// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x18,0x03]
+
+buffer_load_format_d16_xyz v[5:7], off, ttmp[8:11], s3 offset:4095
+// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x1e,0x03]
+
+buffer_load_format_d16_xyz v[5:7], off, s[8:11], s101 offset:4095
+// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0x65]
+
+buffer_load_format_d16_xyz v[5:7], off, s[8:11], m0 offset:4095
+// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0x7c]
+
+buffer_load_format_d16_xyz v[5:7], off, s[8:11], 0 offset:4095
+// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0x80]
+
+buffer_load_format_d16_xyz v[5:7], off, s[8:11], -1 offset:4095
+// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0xc1]
+
+buffer_load_format_d16_xyz v[5:7], off, s[8:11], 0.5 offset:4095
+// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0xf0]
+
+buffer_load_format_d16_xyz v[5:7], off, s[8:11], -4.0 offset:4095
+// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0xf7]
+
+buffer_load_format_d16_xyz v[5:7], v0, s[8:11], s3 idxen offset:4095
+// CHECK: [0xff,0x2f,0x28,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyz v[5:7], v0, s[8:11], s3 offen offset:4095
+// CHECK: [0xff,0x1f,0x28,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyz v[5:7], off, s[8:11], s3
+// CHECK: [0x00,0x00,0x28,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyz v[5:7], off, s[8:11], s3 offset:0
+// CHECK: [0x00,0x00,0x28,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyz v[5:7], off, s[8:11], s3 offset:7
+// CHECK: [0x07,0x00,0x28,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyz v[5:7], off, s[8:11], s3 offset:4095 glc
+// CHECK: [0xff,0x4f,0x28,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyz v[5:7], off, s[8:11], s3 offset:4095 slc
+// CHECK: [0xff,0x0f,0x2a,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[8:11], s3 offset:4095
+// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyzw v[252:255], off, s[8:11], s3 offset:4095
+// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0xfc,0x02,0x03]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[12:15], s3 offset:4095
+// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x03,0x03]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[96:99], s3 offset:4095
+// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x18,0x03]
+
+buffer_load_format_d16_xyzw v[5:8], off, ttmp[8:11], s3 offset:4095
+// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x1e,0x03]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[8:11], s101 offset:4095
+// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0x65]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[8:11], m0 offset:4095
+// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0x7c]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[8:11], 0 offset:4095
+// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0x80]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[8:11], -1 offset:4095
+// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0xc1]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[8:11], 0.5 offset:4095
+// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0xf0]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[8:11], -4.0 offset:4095
+// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0xf7]
+
+buffer_load_format_d16_xyzw v[5:8], v0, s[8:11], s3 idxen offset:4095
+// CHECK: [0xff,0x2f,0x2c,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyzw v[5:8], v0, s[8:11], s3 offen offset:4095
+// CHECK: [0xff,0x1f,0x2c,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[8:11], s3
+// CHECK: [0x00,0x00,0x2c,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[8:11], s3 offset:0
+// CHECK: [0x00,0x00,0x2c,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[8:11], s3 offset:7
+// CHECK: [0x07,0x00,0x2c,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[8:11], s3 offset:4095 glc
+// CHECK: [0xff,0x4f,0x2c,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_load_format_d16_xyzw v[5:8], off, s[8:11], s3 offset:4095 slc
+// CHECK: [0xff,0x0f,0x2e,0xe0,0x00,0x05,0x02,0x03]
+
+buffer_store_format_d16_x v1, off, s[12:15], s4 offset:4095
+// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_x v255, off, s[12:15], s4 offset:4095
+// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0xff,0x03,0x04]
+
+buffer_store_format_d16_x v1, off, s[16:19], s4 offset:4095
+// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x04,0x04]
+
+buffer_store_format_d16_x v1, off, s[96:99], s4 offset:4095
+// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x18,0x04]
+
+buffer_store_format_d16_x v1, off, ttmp[8:11], s4 offset:4095
+// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x1e,0x04]
+
+buffer_store_format_d16_x v1, off, s[12:15], s101 offset:4095
+// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0x65]
+
+buffer_store_format_d16_x v1, off, s[12:15], m0 offset:4095
+// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0x7c]
+
+buffer_store_format_d16_x v1, off, s[12:15], 0 offset:4095
+// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0x80]
+
+buffer_store_format_d16_x v1, off, s[12:15], -1 offset:4095
+// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0xc1]
+
+buffer_store_format_d16_x v1, off, s[12:15], 0.5 offset:4095
+// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0xf0]
+
+buffer_store_format_d16_x v1, off, s[12:15], -4.0 offset:4095
+// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0xf7]
+
+buffer_store_format_d16_x v1, v0, s[12:15], s4 idxen offset:4095
+// CHECK: [0xff,0x2f,0x30,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_x v1, v0, s[12:15], s4 offen offset:4095
+// CHECK: [0xff,0x1f,0x30,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_x v1, off, s[12:15], s4
+// CHECK: [0x00,0x00,0x30,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_x v1, off, s[12:15], s4 offset:0
+// CHECK: [0x00,0x00,0x30,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_x v1, off, s[12:15], s4 offset:7
+// CHECK: [0x07,0x00,0x30,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_x v1, off, s[12:15], s4 offset:4095 glc
+// CHECK: [0xff,0x4f,0x30,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_x v1, off, s[12:15], s4 offset:4095 slc
+// CHECK: [0xff,0x0f,0x32,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xy v[1:2], off, s[12:15], s4 offset:4095
+// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xy v[254:255], off, s[12:15], s4 offset:4095
+// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0xfe,0x03,0x04]
+
+buffer_store_format_d16_xy v[1:2], off, s[16:19], s4 offset:4095
+// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x04,0x04]
+
+buffer_store_format_d16_xy v[1:2], off, s[96:99], s4 offset:4095
+// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x18,0x04]
+
+buffer_store_format_d16_xy v[1:2], off, ttmp[8:11], s4 offset:4095
+// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x1e,0x04]
+
+buffer_store_format_d16_xy v[1:2], off, s[12:15], s101 offset:4095
+// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0x65]
+
+buffer_store_format_d16_xy v[1:2], off, s[12:15], m0 offset:4095
+// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0x7c]
+
+buffer_store_format_d16_xy v[1:2], off, s[12:15], 0 offset:4095
+// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0x80]
+
+buffer_store_format_d16_xy v[1:2], off, s[12:15], -1 offset:4095
+// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0xc1]
+
+buffer_store_format_d16_xy v[1:2], off, s[12:15], 0.5 offset:4095
+// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0xf0]
+
+buffer_store_format_d16_xy v[1:2], off, s[12:15], -4.0 offset:4095
+// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0xf7]
+
+buffer_store_format_d16_xy v[1:2], v0, s[12:15], s4 idxen offset:4095
+// CHECK: [0xff,0x2f,0x34,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xy v[1:2], v0, s[12:15], s4 offen offset:4095
+// CHECK: [0xff,0x1f,0x34,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xy v[1:2], off, s[12:15], s4
+// CHECK: [0x00,0x00,0x34,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xy v[1:2], off, s[12:15], s4 offset:0
+// CHECK: [0x00,0x00,0x34,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xy v[1:2], off, s[12:15], s4 offset:7
+// CHECK: [0x07,0x00,0x34,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xy v[1:2], off, s[12:15], s4 offset:4095 glc
+// CHECK: [0xff,0x4f,0x34,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xy v[1:2], off, s[12:15], s4 offset:4095 slc
+// CHECK: [0xff,0x0f,0x36,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyz v[1:3], off, s[12:15], s4 offset:4095
+// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyz v[253:255], off, s[12:15], s4 offset:4095
+// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0xfd,0x03,0x04]
+
+buffer_store_format_d16_xyz v[1:3], off, s[16:19], s4 offset:4095
+// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x04,0x04]
+
+buffer_store_format_d16_xyz v[1:3], off, s[96:99], s4 offset:4095
+// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x18,0x04]
+
+buffer_store_format_d16_xyz v[1:3], off, ttmp[8:11], s4 offset:4095
+// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x1e,0x04]
+
+buffer_store_format_d16_xyz v[1:3], off, s[12:15], s101 offset:4095
+// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0x65]
+
+buffer_store_format_d16_xyz v[1:3], off, s[12:15], m0 offset:4095
+// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0x7c]
+
+buffer_store_format_d16_xyz v[1:3], off, s[12:15], 0 offset:4095
+// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0x80]
+
+buffer_store_format_d16_xyz v[1:3], off, s[12:15], -1 offset:4095
+// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0xc1]
+
+buffer_store_format_d16_xyz v[1:3], off, s[12:15], 0.5 offset:4095
+// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0xf0]
+
+buffer_store_format_d16_xyz v[1:3], off, s[12:15], -4.0 offset:4095
+// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0xf7]
+
+buffer_store_format_d16_xyz v[1:3], v0, s[12:15], s4 idxen offset:4095
+// CHECK: [0xff,0x2f,0x38,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyz v[1:3], v0, s[12:15], s4 offen offset:4095
+// CHECK: [0xff,0x1f,0x38,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyz v[1:3], off, s[12:15], s4
+// CHECK: [0x00,0x00,0x38,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyz v[1:3], off, s[12:15], s4 offset:0
+// CHECK: [0x00,0x00,0x38,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyz v[1:3], off, s[12:15], s4 offset:7
+// CHECK: [0x07,0x00,0x38,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyz v[1:3], off, s[12:15], s4 offset:4095 glc
+// CHECK: [0xff,0x4f,0x38,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyz v[1:3], off, s[12:15], s4 offset:4095 slc
+// CHECK: [0xff,0x0f,0x3a,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[12:15], s4 offset:4095
+// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyzw v[252:255], off, s[12:15], s4 offset:4095
+// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0xfc,0x03,0x04]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[16:19], s4 offset:4095
+// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x04,0x04]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[96:99], s4 offset:4095
+// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x18,0x04]
+
+buffer_store_format_d16_xyzw v[1:4], off, ttmp[8:11], s4 offset:4095
+// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x1e,0x04]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[12:15], s101 offset:4095
+// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0x65]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[12:15], m0 offset:4095
+// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0x7c]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[12:15], 0 offset:4095
+// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0x80]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[12:15], -1 offset:4095
+// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0xc1]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[12:15], 0.5 offset:4095
+// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0xf0]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[12:15], -4.0 offset:4095
+// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0xf7]
+
+buffer_store_format_d16_xyzw v[1:4], v0, s[12:15], s4 idxen offset:4095
+// CHECK: [0xff,0x2f,0x3c,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyzw v[1:4], v0, s[12:15], s4 offen offset:4095
+// CHECK: [0xff,0x1f,0x3c,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[12:15], s4
+// CHECK: [0x00,0x00,0x3c,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[12:15], s4 offset:0
+// CHECK: [0x00,0x00,0x3c,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[12:15], s4 offset:7
+// CHECK: [0x07,0x00,0x3c,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[12:15], s4 offset:4095 glc
+// CHECK: [0xff,0x4f,0x3c,0xe0,0x00,0x01,0x03,0x04]
+
+buffer_store_format_d16_xyzw v[1:4], off, s[12:15], s4 offset:4095 slc
+// CHECK: [0xff,0x0f,0x3e,0xe0,0x00,0x01,0x03,0x04]
+
 buffer_load_ubyte v5, off, s[8:11], s3 offset:4095
 // CHECK: [0xff,0x0f,0x40,0xe0,0x00,0x05,0x02,0x03]
 
@@ -6855,6 +8031,9 @@ buffer_load_ubyte v5, off, s[8:11], s3 o
 buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 slc
 // CHECK: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03]
 
+buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 lds
+// CHECK: [0xff,0x0f,0x41,0xe0,0x00,0x05,0x02,0x03]
+
 buffer_load_sbyte v5, off, s[8:11], s3 offset:4095
 // CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03]
 
@@ -6909,6 +8088,9 @@ buffer_load_sbyte v5, off, s[8:11], s3 o
 buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 slc
 // CHECK: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03]
 
+buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 lds
+// CHECK: [0xff,0x0f,0x45,0xe0,0x00,0x05,0x02,0x03]
+
 buffer_load_ushort v5, off, s[8:11], s3 offset:4095
 // CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03]
 
@@ -6963,6 +8145,9 @@ buffer_load_ushort v5, off, s[8:11], s3
 buffer_load_ushort v5, off, s[8:11], s3 offset:4095 slc
 // CHECK: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03]
 
+buffer_load_ushort v5, off, s[8:11], s3 offset:4095 lds
+// CHECK: [0xff,0x0f,0x49,0xe0,0x00,0x05,0x02,0x03]
+
 buffer_load_sshort v5, off, s[8:11], s3 offset:4095
 // CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03]
 
@@ -7017,6 +8202,9 @@ buffer_load_sshort v5, off, s[8:11], s3
 buffer_load_sshort v5, off, s[8:11], s3 offset:4095 slc
 // CHECK: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03]
 
+buffer_load_sshort v5, off, s[8:11], s3 offset:4095 lds
+// CHECK: [0xff,0x0f,0x4d,0xe0,0x00,0x05,0x02,0x03]
+
 buffer_load_dword v5, off, s[8:11], s3 offset:4095
 // CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03]
 
@@ -7071,6 +8259,9 @@ buffer_load_dword v5, off, s[8:11], s3 o
 buffer_load_dword v5, off, s[8:11], s3 offset:4095 slc
 // CHECK: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03]
 
+buffer_load_dword v5, off, s[8:11], s3 offset:4095 lds
+// CHECK: [0xff,0x0f,0x51,0xe0,0x00,0x05,0x02,0x03]
+
 buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095
 // CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03]
 
@@ -9069,6 +10260,9 @@ s_load_dwordx8 s[24:31], s[2:3], s2
 s_load_dwordx8 s[92:99], s[2:3], s2
 // CHECK: [0x01,0x17,0x0c,0xc0,0x02,0x00,0x00,0x00]
 
+s_load_dwordx8 ttmp[4:11], s[2:3], s2
+// CHECK: [0x01,0x1d,0x0c,0xc0,0x02,0x00,0x00,0x00]
+
 s_load_dwordx8 s[20:27], s[4:5], s2
 // CHECK: [0x02,0x05,0x0c,0xc0,0x02,0x00,0x00,0x00]
 
@@ -9420,6 +10614,9 @@ s_buffer_load_dwordx8 s[24:31], s[4:7],
 s_buffer_load_dwordx8 s[92:99], s[4:7], s2
 // CHECK: [0x02,0x17,0x2c,0xc0,0x02,0x00,0x00,0x00]
 
+s_buffer_load_dwordx8 ttmp[4:11], s[4:7], s2
+// CHECK: [0x02,0x1d,0x2c,0xc0,0x02,0x00,0x00,0x00]
+
 s_buffer_load_dwordx8 s[20:27], s[8:11], s2
 // CHECK: [0x04,0x05,0x2c,0xc0,0x02,0x00,0x00,0x00]
 
@@ -23112,6 +24309,51 @@ v_interp_p1_f32 v5, v1, attr0.z
 v_interp_p1_f32 v5, v1, attr0.w
 // CHECK: [0x01,0x03,0x14,0xd4]
 
+v_interp_p1_f32_e64 v5, v2, attr0.x
+// CHECK: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x00]
+
+v_interp_p1_f32_e64 v255, v2, attr0.x
+// CHECK: [0xff,0x00,0x70,0xd2,0x00,0x04,0x02,0x00]
+
+v_interp_p1_f32_e64 v5, v2, attr1.x
+// CHECK: [0x05,0x00,0x70,0xd2,0x01,0x04,0x02,0x00]
+
+v_interp_p1_f32_e64 v5, v2, attr31.x
+// CHECK: [0x05,0x00,0x70,0xd2,0x1f,0x04,0x02,0x00]
+
+v_interp_p1_f32_e64 v5, v2, attr32.x
+// CHECK: [0x05,0x00,0x70,0xd2,0x20,0x04,0x02,0x00]
+
+v_interp_p1_f32_e64 v5, v255, attr0.x
+// CHECK: [0x05,0x00,0x70,0xd2,0x00,0xfe,0x03,0x00]
+
+v_interp_p1_f32_e64 v5, -v2, attr0.x
+// CHECK: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x40]
+
+v_interp_p1_f32_e64 v5, |v2|, attr0.x
+// CHECK: [0x05,0x02,0x70,0xd2,0x00,0x04,0x02,0x00]
+
+v_interp_p1_f32_e64 v5, v2, attr0.y
+// CHECK: [0x05,0x00,0x70,0xd2,0x40,0x04,0x02,0x00]
+
+v_interp_p1_f32_e64 v5, v2, attr0.z
+// CHECK: [0x05,0x00,0x70,0xd2,0x80,0x04,0x02,0x00]
+
+v_interp_p1_f32_e64 v5, v2, attr0.w
+// CHECK: [0x05,0x00,0x70,0xd2,0xc0,0x04,0x02,0x00]
+
+v_interp_p1_f32_e64 v5, v2, attr0.x clamp
+// CHECK: [0x05,0x80,0x70,0xd2,0x00,0x04,0x02,0x00]
+
+v_interp_p1_f32_e64 v5, v2, attr0.x mul:2
+// CHECK: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x08]
+
+v_interp_p1_f32_e64 v5, v2, attr0.x mul:4
+// CHECK: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x10]
+
+v_interp_p1_f32_e64 v5, v2, attr0.x div:2
+// CHECK: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x18]
+
 v_interp_p2_f32 v5, v1, attr0.x
 // CHECK: [0x01,0x00,0x15,0xd4]
 
@@ -23139,6 +24381,51 @@ v_interp_p2_f32 v5, v1, attr0.z
 v_interp_p2_f32 v5, v1, attr0.w
 // CHECK: [0x01,0x03,0x15,0xd4]
 
+v_interp_p2_f32_e64 v5, v2, attr0.x
+// CHECK: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x00]
+
+v_interp_p2_f32_e64 v255, v2, attr0.x
+// CHECK: [0xff,0x00,0x71,0xd2,0x00,0x04,0x02,0x00]
+
+v_interp_p2_f32_e64 v5, v2, attr1.x
+// CHECK: [0x05,0x00,0x71,0xd2,0x01,0x04,0x02,0x00]
+
+v_interp_p2_f32_e64 v5, v2, attr31.x
+// CHECK: [0x05,0x00,0x71,0xd2,0x1f,0x04,0x02,0x00]
+
+v_interp_p2_f32_e64 v5, v2, attr32.x
+// CHECK: [0x05,0x00,0x71,0xd2,0x20,0x04,0x02,0x00]
+
+v_interp_p2_f32_e64 v5, v255, attr0.x
+// CHECK: [0x05,0x00,0x71,0xd2,0x00,0xfe,0x03,0x00]
+
+v_interp_p2_f32_e64 v5, -v2, attr0.x
+// CHECK: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x40]
+
+v_interp_p2_f32_e64 v5, |v2|, attr0.x
+// CHECK: [0x05,0x02,0x71,0xd2,0x00,0x04,0x02,0x00]
+
+v_interp_p2_f32_e64 v5, v2, attr0.y
+// CHECK: [0x05,0x00,0x71,0xd2,0x40,0x04,0x02,0x00]
+
+v_interp_p2_f32_e64 v5, v2, attr0.z
+// CHECK: [0x05,0x00,0x71,0xd2,0x80,0x04,0x02,0x00]
+
+v_interp_p2_f32_e64 v5, v2, attr0.w
+// CHECK: [0x05,0x00,0x71,0xd2,0xc0,0x04,0x02,0x00]
+
+v_interp_p2_f32_e64 v5, v2, attr0.x clamp
+// CHECK: [0x05,0x80,0x71,0xd2,0x00,0x04,0x02,0x00]
+
+v_interp_p2_f32_e64 v5, v2, attr0.x mul:2
+// CHECK: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x08]
+
+v_interp_p2_f32_e64 v5, v2, attr0.x mul:4
+// CHECK: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x10]
+
+v_interp_p2_f32_e64 v5, v2, attr0.x div:2
+// CHECK: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x18]
+
 v_interp_mov_f32 v5, p10, attr0.x
 // CHECK: [0x00,0x00,0x16,0xd4]
 
@@ -23169,6 +24456,48 @@ v_interp_mov_f32 v5, p10, attr0.z
 v_interp_mov_f32 v5, p10, attr0.w
 // CHECK: [0x00,0x03,0x16,0xd4]
 
+v_interp_mov_f32_e64 v5, p10, attr0.x
+// CHECK: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x00]
+
+v_interp_mov_f32_e64 v255, p10, attr0.x
+// CHECK: [0xff,0x00,0x72,0xd2,0x00,0x00,0x00,0x00]
+
+v_interp_mov_f32_e64 v5, p10, attr1.x
+// CHECK: [0x05,0x00,0x72,0xd2,0x01,0x00,0x00,0x00]
+
+v_interp_mov_f32_e64 v5, p10, attr31.x
+// CHECK: [0x05,0x00,0x72,0xd2,0x1f,0x00,0x00,0x00]
+
+v_interp_mov_f32_e64 v5, p10, attr32.x
+// CHECK: [0x05,0x00,0x72,0xd2,0x20,0x00,0x00,0x00]
+
+v_interp_mov_f32_e64 v5, p20, attr0.x
+// CHECK: [0x05,0x00,0x72,0xd2,0x00,0x02,0x00,0x00]
+
+v_interp_mov_f32_e64 v5, p0, attr0.x
+// CHECK: [0x05,0x00,0x72,0xd2,0x00,0x04,0x00,0x00]
+
+v_interp_mov_f32_e64 v5, p10, attr0.y
+// CHECK: [0x05,0x00,0x72,0xd2,0x40,0x00,0x00,0x00]
+
+v_interp_mov_f32_e64 v5, p10, attr0.z
+// CHECK: [0x05,0x00,0x72,0xd2,0x80,0x00,0x00,0x00]
+
+v_interp_mov_f32_e64 v5, p10, attr0.w
+// CHECK: [0x05,0x00,0x72,0xd2,0xc0,0x00,0x00,0x00]
+
+v_interp_mov_f32_e64 v5, p10, attr0.x clamp
+// CHECK: [0x05,0x80,0x72,0xd2,0x00,0x00,0x00,0x00]
+
+v_interp_mov_f32_e64 v5, p10, attr0.x mul:2
+// CHECK: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x08]
+
+v_interp_mov_f32_e64 v5, p10, attr0.x mul:4
+// CHECK: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x10]
+
+v_interp_mov_f32_e64 v5, p10, attr0.x div:2
+// CHECK: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x18]
+
 v_nop
 // CHECK: [0x00,0x00,0x00,0x7e]
 
@@ -23445,9 +24774,6 @@ v_cvt_i32_f64_e64 v5, -v[1:2]
 v_cvt_i32_f64_e64 v5, |v[1:2]|
 // CHECK: [0x05,0x01,0x43,0xd1,0x01,0x01,0x00,0x00]
 
-v_cvt_i32_f64_e64 v5, v[1:2] clamp
-// CHECK: [0x05,0x80,0x43,0xd1,0x01,0x01,0x00,0x00]
-
 v_cvt_f64_i32 v[5:6], v1
 // CHECK: [0x01,0x09,0x0a,0x7e]
 
@@ -24018,9 +25344,6 @@ v_cvt_u32_f32_e64 v5, -v1
 v_cvt_u32_f32_e64 v5, |v1|
 // CHECK: [0x05,0x01,0x47,0xd1,0x01,0x01,0x00,0x00]
 
-v_cvt_u32_f32_e64 v5, v1 clamp
-// CHECK: [0x05,0x80,0x47,0xd1,0x01,0x01,0x00,0x00]
-
 v_cvt_i32_f32 v5, v1
 // CHECK: [0x01,0x11,0x0a,0x7e]
 
@@ -24159,9 +25482,6 @@ v_cvt_i32_f32_e64 v5, -v1
 v_cvt_i32_f32_e64 v5, |v1|
 // CHECK: [0x05,0x01,0x48,0xd1,0x01,0x01,0x00,0x00]
 
-v_cvt_i32_f32_e64 v5, v1 clamp
-// CHECK: [0x05,0x80,0x48,0xd1,0x01,0x01,0x00,0x00]
-
 v_mov_fed_b32 v5, v1
 // CHECK: [0x01,0x13,0x0a,0x7e]
 
@@ -24732,9 +26052,6 @@ v_cvt_rpi_i32_f32_e64 v5, -v1
 v_cvt_rpi_i32_f32_e64 v5, |v1|
 // CHECK: [0x05,0x01,0x4c,0xd1,0x01,0x01,0x00,0x00]
 
-v_cvt_rpi_i32_f32_e64 v5, v1 clamp
-// CHECK: [0x05,0x80,0x4c,0xd1,0x01,0x01,0x00,0x00]
-
 v_cvt_flr_i32_f32 v5, v1
 // CHECK: [0x01,0x1b,0x0a,0x7e]
 
@@ -24873,9 +26190,6 @@ v_cvt_flr_i32_f32_e64 v5, -v1
 v_cvt_flr_i32_f32_e64 v5, |v1|
 // CHECK: [0x05,0x01,0x4d,0xd1,0x01,0x01,0x00,0x00]
 
-v_cvt_flr_i32_f32_e64 v5, v1 clamp
-// CHECK: [0x05,0x80,0x4d,0xd1,0x01,0x01,0x00,0x00]
-
 v_cvt_off_f32_i4 v5, v1
 // CHECK: [0x01,0x1d,0x0a,0x7e]
 
@@ -25974,9 +27288,6 @@ v_cvt_u32_f64_e64 v5, -v[1:2]
 v_cvt_u32_f64_e64 v5, |v[1:2]|
 // CHECK: [0x05,0x01,0x55,0xd1,0x01,0x01,0x00,0x00]
 
-v_cvt_u32_f64_e64 v5, v[1:2] clamp
-// CHECK: [0x05,0x80,0x55,0xd1,0x01,0x01,0x00,0x00]
-
 v_cvt_f64_u32 v[5:6], v1
 // CHECK: [0x01,0x2d,0x0a,0x7e]
 
@@ -29661,9 +30972,6 @@ v_frexp_exp_i32_f64_e64 v5, -v[1:2]
 v_frexp_exp_i32_f64_e64 v5, |v[1:2]|
 // CHECK: [0x05,0x01,0x70,0xd1,0x01,0x01,0x00,0x00]
 
-v_frexp_exp_i32_f64_e64 v5, v[1:2] clamp
-// CHECK: [0x05,0x80,0x70,0xd1,0x01,0x01,0x00,0x00]
-
 v_frexp_mant_f64 v[5:6], v[1:2]
 // CHECK: [0x01,0x63,0x0a,0x7e]
 
@@ -30042,9 +31350,6 @@ v_frexp_exp_i32_f32_e64 v5, -v1
 v_frexp_exp_i32_f32_e64 v5, |v1|
 // CHECK: [0x05,0x01,0x73,0xd1,0x01,0x01,0x00,0x00]
 
-v_frexp_exp_i32_f32_e64 v5, v1 clamp
-// CHECK: [0x05,0x80,0x73,0xd1,0x01,0x01,0x00,0x00]
-
 v_frexp_mant_f32 v5, v1
 // CHECK: [0x01,0x69,0x0a,0x7e]
 
@@ -30693,9 +31998,6 @@ v_cvt_u16_f16_e64 v5, -v1
 v_cvt_u16_f16_e64 v5, |v1|
 // CHECK: [0x05,0x01,0x7b,0xd1,0x01,0x01,0x00,0x00]
 
-v_cvt_u16_f16_e64 v5, v1 clamp
-// CHECK: [0x05,0x80,0x7b,0xd1,0x01,0x01,0x00,0x00]
-
 v_cvt_i16_f16 v5, v1
 // CHECK: [0x01,0x79,0x0a,0x7e]
 
@@ -30834,9 +32136,6 @@ v_cvt_i16_f16_e64 v5, -v1
 v_cvt_i16_f16_e64 v5, |v1|
 // CHECK: [0x05,0x01,0x7c,0xd1,0x01,0x01,0x00,0x00]
 
-v_cvt_i16_f16_e64 v5, v1 clamp
-// CHECK: [0x05,0x80,0x7c,0xd1,0x01,0x01,0x00,0x00]
-
 v_rcp_f16 v5, v1
 // CHECK: [0x01,0x7b,0x0a,0x7e]
 
@@ -31821,9 +33120,6 @@ v_frexp_exp_i16_f16_e64 v5, -v1
 v_frexp_exp_i16_f16_e64 v5, |v1|
 // CHECK: [0x05,0x01,0x83,0xd1,0x01,0x01,0x00,0x00]
 
-v_frexp_exp_i16_f16_e64 v5, v1 clamp
-// CHECK: [0x05,0x80,0x83,0xd1,0x01,0x01,0x00,0x00]
-
 v_floor_f16 v5, v1
 // CHECK: [0x01,0x89,0x0a,0x7e]
 
@@ -43116,6 +44412,9 @@ v_mad_i32_i24 v5, v1, v2, 0.5
 v_mad_i32_i24 v5, v1, v2, -4.0
 // CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0xde,0x03]
 
+v_mad_i32_i24 v5, v1, v2, v3 clamp
+// CHECK: [0x05,0x80,0xc2,0xd1,0x01,0x05,0x0e,0x04]
+
 v_mad_u32_u24 v5, v1, v2, v3
 // CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -43293,6 +44592,9 @@ v_mad_u32_u24 v5, v1, v2, 0.5
 v_mad_u32_u24 v5, v1, v2, -4.0
 // CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0xde,0x03]
 
+v_mad_u32_u24 v5, v1, v2, v3 clamp
+// CHECK: [0x05,0x80,0xc3,0xd1,0x01,0x05,0x0e,0x04]
+
 v_cubeid_f32 v5, v1, v2, v3
 // CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -47466,6 +48768,9 @@ v_sad_u8 v5, v1, v2, 0.5
 v_sad_u8 v5, v1, v2, -4.0
 // CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0xde,0x03]
 
+v_sad_u8 v5, v1, v2, v3 clamp
+// CHECK: [0x05,0x80,0xd9,0xd1,0x01,0x05,0x0e,0x04]
+
 v_sad_hi_u8 v5, v1, v2, v3
 // CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -47643,6 +48948,9 @@ v_sad_hi_u8 v5, v1, v2, 0.5
 v_sad_hi_u8 v5, v1, v2, -4.0
 // CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0xde,0x03]
 
+v_sad_hi_u8 v5, v1, v2, v3 clamp
+// CHECK: [0x05,0x80,0xda,0xd1,0x01,0x05,0x0e,0x04]
+
 v_sad_u16 v5, v1, v2, v3
 // CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -47820,6 +49128,9 @@ v_sad_u16 v5, v1, v2, 0.5
 v_sad_u16 v5, v1, v2, -4.0
 // CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0xde,0x03]
 
+v_sad_u16 v5, v1, v2, v3 clamp
+// CHECK: [0x05,0x80,0xdb,0xd1,0x01,0x05,0x0e,0x04]
+
 v_sad_u32 v5, v1, v2, v3
 // CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -47997,6 +49308,9 @@ v_sad_u32 v5, v1, v2, 0.5
 v_sad_u32 v5, v1, v2, -4.0
 // CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0xde,0x03]
 
+v_sad_u32 v5, v1, v2, v3 clamp
+// CHECK: [0x05,0x80,0xdc,0xd1,0x01,0x05,0x0e,0x04]
+
 v_cvt_pk_u8_f32 v5, v1, v2, v3
 // CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -48180,9 +49494,6 @@ v_cvt_pk_u8_f32 v5, -v1, v2, v3
 v_cvt_pk_u8_f32 v5, |v1|, v2, v3
 // CHECK: [0x05,0x01,0xdd,0xd1,0x01,0x05,0x0e,0x04]
 
-v_cvt_pk_u8_f32 v5, v1, v2, v3 clamp
-// CHECK: [0x05,0x80,0xdd,0xd1,0x01,0x05,0x0e,0x04]
-
 v_div_fixup_f32 v5, v1, v2, v3
 // CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -49233,6 +50544,9 @@ v_msad_u8 v5, v1, v2, 0.5
 v_msad_u8 v5, v1, v2, -4.0
 // CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0xde,0x03]
 
+v_msad_u8 v5, v1, v2, v3 clamp
+// CHECK: [0x05,0x80,0xe4,0xd1,0x01,0x05,0x0e,0x04]
+
 v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4]
 // CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -49380,6 +50694,9 @@ v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, 0.5
 v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, -4.0
 // CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xde,0x03]
 
+v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4] clamp
+// CHECK: [0x05,0x80,0xe5,0xd1,0x01,0x05,0x0e,0x04]
+
 v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4]
 // CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -49527,6 +50844,9 @@ v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, 0.
 v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, -4.0
 // CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xde,0x03]
 
+v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4] clamp
+// CHECK: [0x05,0x80,0xe6,0xd1,0x01,0x05,0x0e,0x04]
+
 v_mqsad_u32_u8 v[252:255], v[1:2], v2, v[3:6]
 // CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -49623,6 +50943,9 @@ v_mqsad_u32_u8 v[252:255], v[1:2], 0.5,
 v_mqsad_u32_u8 v[252:255], v[1:2], -4.0, v[3:6]
 // CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xef,0x0d,0x04]
 
+v_mqsad_u32_u8 v[252:255], v[1:2], v2, v[3:6] clamp
+// CHECK: [0xfc,0x80,0xe7,0xd1,0x01,0x05,0x0e,0x04]
+
 v_mad_u64_u32 v[5:6], s[12:13], v1, v2, v[3:4]
 // CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -49806,6 +51129,9 @@ v_mad_u64_u32 v[5:6], s[12:13], v1, v2,
 v_mad_u64_u32 v[5:6], s[12:13], v1, v2, -4.0
 // CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0xde,0x03]
 
+v_mad_u64_u32 v[5:6], s[12:13], v1, v2, v[3:4] clamp
+// CHECK: [0x05,0x8c,0xe8,0xd1,0x01,0x05,0x0e,0x04]
+
 v_mad_i64_i32 v[5:6], s[12:13], v1, v2, v[3:4]
 // CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -49989,6 +51315,9 @@ v_mad_i64_i32 v[5:6], s[12:13], v1, v2,
 v_mad_i64_i32 v[5:6], s[12:13], v1, v2, -4.0
 // CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0xde,0x03]
 
+v_mad_i64_i32 v[5:6], s[12:13], v1, v2, v[3:4] clamp
+// CHECK: [0x05,0x8c,0xe9,0xd1,0x01,0x05,0x0e,0x04]
+
 v_mad_f16 v5, v1, v2, v3
 // CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -50370,6 +51699,9 @@ v_mad_u16 v5, v1, v2, 0.5
 v_mad_u16 v5, v1, v2, -4.0
 // CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0xde,0x03]
 
+v_mad_u16 v5, v1, v2, v3 clamp
+// CHECK: [0x05,0x80,0xeb,0xd1,0x01,0x05,0x0e,0x04]
+
 v_mad_i16 v5, v1, v2, v3
 // CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -50547,6 +51879,9 @@ v_mad_i16 v5, v1, v2, 0.5
 v_mad_i16 v5, v1, v2, -4.0
 // CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0xde,0x03]
 
+v_mad_i16 v5, v1, v2, v3 clamp
+// CHECK: [0x05,0x80,0xec,0xd1,0x01,0x05,0x0e,0x04]
+
 v_perm_b32 v5, v1, v2, v3
 // CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0x0e,0x04]
 
@@ -51258,25 +52593,175 @@ v_cvt_pkaccum_u8_f32 v5, -v1, v2
 v_cvt_pkaccum_u8_f32 v5, |v1|, v2
 // CHECK: [0x05,0x01,0xf0,0xd1,0x01,0x05,0x02,0x00]
 
-v_cvt_pkaccum_u8_f32 v5, v1, v2 clamp
-// CHECK: [0x05,0x80,0xf0,0xd1,0x01,0x05,0x02,0x00]
+v_interp_p1ll_f16 v5, v2, attr0.x
+// CHECK: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x00]
 
-v_add_f64 v[5:6], v[1:2], v[2:3]
-// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x05,0x02,0x00]
+v_interp_p1ll_f16 v255, v2, attr0.x
+// CHECK: [0xff,0x00,0x74,0xd2,0x00,0x04,0x02,0x00]
 
-v_add_f64 v[254:255], v[1:2], v[2:3]
-// CHECK: [0xfe,0x00,0x80,0xd2,0x01,0x05,0x02,0x00]
+v_interp_p1ll_f16 v5, v2, attr1.x
+// CHECK: [0x05,0x00,0x74,0xd2,0x01,0x04,0x02,0x00]
 
-v_add_f64 v[5:6], v[254:255], v[2:3]
-// CHECK: [0x05,0x00,0x80,0xd2,0xfe,0x05,0x02,0x00]
+v_interp_p1ll_f16 v5, v2, attr31.x
+// CHECK: [0x05,0x00,0x74,0xd2,0x1f,0x04,0x02,0x00]
 
-v_add_f64 v[5:6], s[2:3], v[2:3]
-// CHECK: [0x05,0x00,0x80,0xd2,0x02,0x04,0x02,0x00]
+v_interp_p1ll_f16 v5, v2, attr32.x
+// CHECK: [0x05,0x00,0x74,0xd2,0x20,0x04,0x02,0x00]
 
-v_add_f64 v[5:6], s[4:5], v[2:3]
-// CHECK: [0x05,0x00,0x80,0xd2,0x04,0x04,0x02,0x00]
+v_interp_p1ll_f16 v5, v255, attr0.x
+// CHECK: [0x05,0x00,0x74,0xd2,0x00,0xfe,0x03,0x00]
 
-v_add_f64 v[5:6], s[100:101], v[2:3]
+v_interp_p1ll_f16 v5, -v2, attr0.x
+// CHECK: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x40]
+
+v_interp_p1ll_f16 v5, |v2|, attr0.x
+// CHECK: [0x05,0x02,0x74,0xd2,0x00,0x04,0x02,0x00]
+
+v_interp_p1ll_f16 v5, v2, attr0.y
+// CHECK: [0x05,0x00,0x74,0xd2,0x40,0x04,0x02,0x00]
+
+v_interp_p1ll_f16 v5, v2, attr0.z
+// CHECK: [0x05,0x00,0x74,0xd2,0x80,0x04,0x02,0x00]
+
+v_interp_p1ll_f16 v5, v2, attr0.w
+// CHECK: [0x05,0x00,0x74,0xd2,0xc0,0x04,0x02,0x00]
+
+v_interp_p1ll_f16 v5, v2, attr0.x high
+// CHECK: [0x05,0x00,0x74,0xd2,0x00,0x05,0x02,0x00]
+
+v_interp_p1ll_f16 v5, v2, attr0.x clamp
+// CHECK: [0x05,0x80,0x74,0xd2,0x00,0x04,0x02,0x00]
+
+v_interp_p1ll_f16 v5, v2, attr0.x mul:2
+// CHECK: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x08]
+
+v_interp_p1ll_f16 v5, v2, attr0.x mul:4
+// CHECK: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x10]
+
+v_interp_p1ll_f16 v5, v2, attr0.x div:2
+// CHECK: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x18]
+
+v_interp_p1lv_f16 v5, v2, attr0.x, v3
+// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x04]
+
+v_interp_p1lv_f16 v255, v2, attr0.x, v3
+// CHECK: [0xff,0x00,0x75,0xd2,0x00,0x04,0x0e,0x04]
+
+v_interp_p1lv_f16 v5, v2, attr1.x, v3
+// CHECK: [0x05,0x00,0x75,0xd2,0x01,0x04,0x0e,0x04]
+
+v_interp_p1lv_f16 v5, v2, attr31.x, v3
+// CHECK: [0x05,0x00,0x75,0xd2,0x1f,0x04,0x0e,0x04]
+
+v_interp_p1lv_f16 v5, v2, attr32.x, v3
+// CHECK: [0x05,0x00,0x75,0xd2,0x20,0x04,0x0e,0x04]
+
+v_interp_p1lv_f16 v5, v255, attr0.x, v3
+// CHECK: [0x05,0x00,0x75,0xd2,0x00,0xfe,0x0f,0x04]
+
+v_interp_p1lv_f16 v5, v2, attr0.x, v255
+// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0xfe,0x07]
+
+v_interp_p1lv_f16 v5, -v2, attr0.x, v3
+// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x44]
+
+v_interp_p1lv_f16 v5, v2, attr0.x, -v3
+// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x84]
+
+v_interp_p1lv_f16 v5, |v2|, attr0.x, v3
+// CHECK: [0x05,0x02,0x75,0xd2,0x00,0x04,0x0e,0x04]
+
+v_interp_p1lv_f16 v5, v2, attr0.x, |v3|
+// CHECK: [0x05,0x04,0x75,0xd2,0x00,0x04,0x0e,0x04]
+
+v_interp_p1lv_f16 v5, v2, attr0.y, v3
+// CHECK: [0x05,0x00,0x75,0xd2,0x40,0x04,0x0e,0x04]
+
+v_interp_p1lv_f16 v5, v2, attr0.z, v3
+// CHECK: [0x05,0x00,0x75,0xd2,0x80,0x04,0x0e,0x04]
+
+v_interp_p1lv_f16 v5, v2, attr0.w, v3
+// CHECK: [0x05,0x00,0x75,0xd2,0xc0,0x04,0x0e,0x04]
+
+v_interp_p1lv_f16 v5, v2, attr0.x, v3 high
+// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x05,0x0e,0x04]
+
+v_interp_p1lv_f16 v5, v2, attr0.x, v3 clamp
+// CHECK: [0x05,0x80,0x75,0xd2,0x00,0x04,0x0e,0x04]
+
+v_interp_p1lv_f16 v5, v2, attr0.x, v3 mul:2
+// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x0c]
+
+v_interp_p1lv_f16 v5, v2, attr0.x, v3 mul:4
+// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x14]
+
+v_interp_p1lv_f16 v5, v2, attr0.x, v3 div:2
+// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x1c]
+
+v_interp_p2_f16 v5, v2, attr0.x, v3
+// CHECK: [0x05,0x00,0x76,0xd2,0x00,0x04,0x0e,0x04]
+
+v_interp_p2_f16 v255, v2, attr0.x, v3
+// CHECK: [0xff,0x00,0x76,0xd2,0x00,0x04,0x0e,0x04]
+
+v_interp_p2_f16 v5, v2, attr1.x, v3
+// CHECK: [0x05,0x00,0x76,0xd2,0x01,0x04,0x0e,0x04]
+
+v_interp_p2_f16 v5, v2, attr31.x, v3
+// CHECK: [0x05,0x00,0x76,0xd2,0x1f,0x04,0x0e,0x04]
+
+v_interp_p2_f16 v5, v2, attr32.x, v3
+// CHECK: [0x05,0x00,0x76,0xd2,0x20,0x04,0x0e,0x04]
+
+v_interp_p2_f16 v5, v255, attr0.x, v3
+// CHECK: [0x05,0x00,0x76,0xd2,0x00,0xfe,0x0f,0x04]
+
+v_interp_p2_f16 v5, v2, attr0.x, v255
+// CHECK: [0x05,0x00,0x76,0xd2,0x00,0x04,0xfe,0x07]
+
+v_interp_p2_f16 v5, -v2, attr0.x, v3
+// CHECK: [0x05,0x00,0x76,0xd2,0x00,0x04,0x0e,0x44]
+
+v_interp_p2_f16 v5, v2, attr0.x, -v3
+// CHECK: [0x05,0x00,0x76,0xd2,0x00,0x04,0x0e,0x84]
+
+v_interp_p2_f16 v5, |v2|, attr0.x, v3
+// CHECK: [0x05,0x02,0x76,0xd2,0x00,0x04,0x0e,0x04]
+
+v_interp_p2_f16 v5, v2, attr0.x, |v3|
+// CHECK: [0x05,0x04,0x76,0xd2,0x00,0x04,0x0e,0x04]
+
+v_interp_p2_f16 v5, v2, attr0.y, v3
+// CHECK: [0x05,0x00,0x76,0xd2,0x40,0x04,0x0e,0x04]
+
+v_interp_p2_f16 v5, v2, attr0.z, v3
+// CHECK: [0x05,0x00,0x76,0xd2,0x80,0x04,0x0e,0x04]
+
+v_interp_p2_f16 v5, v2, attr0.w, v3
+// CHECK: [0x05,0x00,0x76,0xd2,0xc0,0x04,0x0e,0x04]
+
+v_interp_p2_f16 v5, v2, attr0.x, v3 high
+// CHECK: [0x05,0x00,0x76,0xd2,0x00,0x05,0x0e,0x04]
+
+v_interp_p2_f16 v5, v2, attr0.x, v3 clamp
+// CHECK: [0x05,0x80,0x76,0xd2,0x00,0x04,0x0e,0x04]
+
+v_add_f64 v[5:6], v[1:2], v[2:3]
+// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x05,0x02,0x00]
+
+v_add_f64 v[254:255], v[1:2], v[2:3]
+// CHECK: [0xfe,0x00,0x80,0xd2,0x01,0x05,0x02,0x00]
+
+v_add_f64 v[5:6], v[254:255], v[2:3]
+// CHECK: [0x05,0x00,0x80,0xd2,0xfe,0x05,0x02,0x00]
+
+v_add_f64 v[5:6], s[2:3], v[2:3]
+// CHECK: [0x05,0x00,0x80,0xd2,0x02,0x04,0x02,0x00]
+
+v_add_f64 v[5:6], s[4:5], v[2:3]
+// CHECK: [0x05,0x00,0x80,0xd2,0x04,0x04,0x02,0x00]
+
+v_add_f64 v[5:6], s[100:101], v[2:3]
 // CHECK: [0x05,0x00,0x80,0xd2,0x64,0x04,0x02,0x00]
 
 v_add_f64 v[5:6], flat_scratch, v[2:3]
@@ -53535,9 +55020,6 @@ v_cvt_pknorm_i16_f32 v5, v1, |v2|
 v_cvt_pknorm_i16_f32 v5, |v1|, |v2|
 // CHECK: [0x05,0x03,0x94,0xd2,0x01,0x05,0x02,0x00]
 
-v_cvt_pknorm_i16_f32 v5, v1, v2 clamp
-// CHECK: [0x05,0x80,0x94,0xd2,0x01,0x05,0x02,0x00]
-
 v_cvt_pknorm_u16_f32 v5, v1, v2
 // CHECK: [0x05,0x00,0x95,0xd2,0x01,0x05,0x02,0x00]
 
@@ -53676,9 +55158,6 @@ v_cvt_pknorm_u16_f32 v5, v1, |v2|
 v_cvt_pknorm_u16_f32 v5, |v1|, |v2|
 // CHECK: [0x05,0x03,0x95,0xd2,0x01,0x05,0x02,0x00]
 
-v_cvt_pknorm_u16_f32 v5, v1, v2 clamp
-// CHECK: [0x05,0x80,0x95,0xd2,0x01,0x05,0x02,0x00]
-
 v_cvt_pkrtz_f16_f32 v5, v1, v2
 // CHECK: [0x05,0x00,0x96,0xd2,0x01,0x05,0x02,0x00]
 
@@ -53817,9 +55296,6 @@ v_cvt_pkrtz_f16_f32 v5, v1, |v2|
 v_cvt_pkrtz_f16_f32 v5, |v1|, |v2|
 // CHECK: [0x05,0x03,0x96,0xd2,0x01,0x05,0x02,0x00]
 
-v_cvt_pkrtz_f16_f32 v5, v1, v2 clamp
-// CHECK: [0x05,0x80,0x96,0xd2,0x01,0x05,0x02,0x00]
-
 v_cvt_pk_u16_u32 v5, v1, v2
 // CHECK: [0x05,0x00,0x97,0xd2,0x01,0x05,0x02,0x00]
 
@@ -93277,67 +94753,67 @@ v_cmpx_t_u64_e64 s[10:11], v[1:2], -4.0
 // CHECK: [0x0a,0x00,0xff,0xd0,0x01,0xef,0x01,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_mov_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x02,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x02,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_mov_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_mov_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -93421,70 +94897,70 @@ v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3]
 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0a,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_f32_i32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -93568,70 +95044,70 @@ v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,
 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0c,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_f32_u32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -93715,73 +95191,70 @@ v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,
 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0e,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0xff,0x06,0x06,0x06]
-
-v_cvt_u32_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_u32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_cvt_u32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -93871,73 +95344,70 @@ v_cvt_u32_f32_dpp v5, |v1| quad_perm:[0,
 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x10,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0xff,0x06,0x06,0x06]
-
-v_cvt_i32_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_i32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_cvt_i32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -94027,67 +95497,67 @@ v_cvt_i32_f32_dpp v5, |v1| quad_perm:[0,
 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_mov_fed_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x12,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x12,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_mov_fed_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_mov_fed_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -94171,73 +95641,73 @@ v_mov_fed_b32_dpp v5, v1 quad_perm:[0,1,
 // CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x14,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_f16_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_cvt_f16_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -94327,73 +95797,73 @@ v_cvt_f16_f32_dpp v5, |v1| quad_perm:[0,
 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x16,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_f32_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_cvt_f32_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -94483,73 +95953,70 @@ v_cvt_f32_f16_dpp v5, |v1| quad_perm:[0,
 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x18,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0xff,0x06,0x06,0x06]
-
-v_cvt_rpi_i32_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_cvt_rpi_i32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -94639,73 +96106,70 @@ v_cvt_rpi_i32_f32_dpp v5, |v1| quad_perm
 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x1a,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0xff,0x06,0x06,0x06]
-
-v_cvt_flr_i32_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_cvt_flr_i32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -94795,70 +96259,70 @@ v_cvt_flr_i32_f32_dpp v5, |v1| quad_perm
 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x1c,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_off_f32_i4_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -94942,70 +96406,70 @@ v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0
 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x22,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_f32_ubyte0_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -95089,70 +96553,70 @@ v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0
 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x24,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_f32_ubyte1_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -95236,70 +96700,70 @@ v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0
 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x26,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_f32_ubyte2_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -95383,70 +96847,70 @@ v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0
 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x28,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_f32_ubyte3_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -95530,73 +96994,73 @@ v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0
 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_fract_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x36,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_fract_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_fract_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_fract_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -95686,73 +97150,73 @@ v_fract_f32_dpp v5, |v1| quad_perm:[0,1,
 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_trunc_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x38,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_trunc_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_trunc_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -95842,73 +97306,73 @@ v_trunc_f32_dpp v5, |v1| quad_perm:[0,1,
 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ceil_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3a,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_ceil_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_ceil_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -95998,73 +97462,73 @@ v_ceil_f32_dpp v5, |v1| quad_perm:[0,1,2
 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rndne_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3c,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_rndne_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_rndne_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -96154,73 +97618,73 @@ v_rndne_f32_dpp v5, |v1| quad_perm:[0,1,
 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_floor_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3e,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_floor_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_floor_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_floor_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -96310,73 +97774,73 @@ v_floor_f32_dpp v5, |v1| quad_perm:[0,1,
 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_exp_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x40,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_exp_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_exp_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_exp_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -96466,73 +97930,73 @@ v_exp_f32_dpp v5, |v1| quad_perm:[0,1,2,
 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_log_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x42,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_log_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_log_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_log_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -96622,73 +98086,73 @@ v_log_f32_dpp v5, |v1| quad_perm:[0,1,2,
 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rcp_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x44,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_rcp_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_rcp_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -96778,73 +98242,73 @@ v_rcp_f32_dpp v5, |v1| quad_perm:[0,1,2,
 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x46,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_rcp_iflag_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_rcp_iflag_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -96934,73 +98398,73 @@ v_rcp_iflag_f32_dpp v5, |v1| quad_perm:[
 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rsq_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x48,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_rsq_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_rsq_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -97090,73 +98554,73 @@ v_rsq_f32_dpp v5, |v1| quad_perm:[0,1,2,
 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_sqrt_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x4e,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_sqrt_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_sqrt_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -97246,73 +98710,73 @@ v_sqrt_f32_dpp v5, |v1| quad_perm:[0,1,2
 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_sin_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x52,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_sin_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_sin_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_sin_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -97402,73 +98866,73 @@ v_sin_f32_dpp v5, |v1| quad_perm:[0,1,2,
 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cos_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x54,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cos_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cos_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_cos_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -97558,67 +99022,67 @@ v_cos_f32_dpp v5, |v1| quad_perm:[0,1,2,
 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_not_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x56,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x56,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_not_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_not_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_not_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -97702,67 +99166,67 @@ v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3]
 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_bfrev_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x58,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x58,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_bfrev_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -97846,70 +99310,67 @@ v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,
 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ffbh_u32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5a,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0xff,0x06,0x06,0x06]
-
-v_ffbh_u32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_ffbh_u32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -97993,67 +99454,67 @@ v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3
 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ffbl_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5c,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_ffbl_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -98137,70 +99598,67 @@ v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3
 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ffbh_i32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5e,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0xff,0x06,0x06,0x06]
-
-v_ffbh_i32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_ffbh_i32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -98284,73 +99742,70 @@ v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3
 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x66,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0xff,0x06,0x06,0x06]
-
-v_frexp_exp_i32_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_frexp_exp_i32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -98440,73 +99895,73 @@ v_frexp_exp_i32_f32_dpp v5, |v1| quad_pe
 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x68,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_frexp_mant_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_frexp_mant_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -98596,70 +100051,70 @@ v_frexp_mant_f32_dpp v5, |v1| quad_perm:
 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x72,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_f16_u16_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -98743,70 +100198,70 @@ v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,
 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x74,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_f16_i16_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x0e,0x06]
+// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x0e,0x00]
 
 v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -98890,73 +100345,70 @@ v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,
 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x08,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x76,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0xff,0x06,0x06,0x06]
-
-v_cvt_u16_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_u16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_cvt_u16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -99046,73 +100498,70 @@ v_cvt_u16_f16_dpp v5, |v1| quad_perm:[0,
 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x78,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0xff,0x06,0x06,0x06]
-
-v_cvt_i16_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cvt_i16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_cvt_i16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -99202,73 +100651,73 @@ v_cvt_i16_f16_dpp v5, |v1| quad_perm:[0,
 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rcp_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7a,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_rcp_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_rcp_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -99358,73 +100807,73 @@ v_rcp_f16_dpp v5, |v1| quad_perm:[0,1,2,
 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_sqrt_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7c,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_sqrt_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_sqrt_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -99514,73 +100963,73 @@ v_sqrt_f16_dpp v5, |v1| quad_perm:[0,1,2
 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rsq_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7e,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_rsq_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_rsq_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -99670,73 +101119,73 @@ v_rsq_f16_dpp v5, |v1| quad_perm:[0,1,2,
 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_log_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x80,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_log_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_log_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_log_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -99826,73 +101275,73 @@ v_log_f16_dpp v5, |v1| quad_perm:[0,1,2,
 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_exp_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x82,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_exp_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_exp_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_exp_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -99982,73 +101431,73 @@ v_exp_f16_dpp v5, |v1| quad_perm:[0,1,2,
 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x84,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_frexp_mant_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_frexp_mant_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -100138,73 +101587,70 @@ v_frexp_mant_f16_dpp v5, |v1| quad_perm:
 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x86,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0xff,0x06,0x06,0x06]
-
-v_frexp_exp_i16_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_frexp_exp_i16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -100294,73 +101740,73 @@ v_frexp_exp_i16_f16_dpp v5, |v1| quad_pe
 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_floor_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x88,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_floor_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_floor_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_floor_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -100450,73 +101896,73 @@ v_floor_f16_dpp v5, |v1| quad_perm:[0,1,
 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ceil_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8a,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_ceil_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_ceil_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -100606,73 +102052,73 @@ v_ceil_f16_dpp v5, |v1| quad_perm:[0,1,2
 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_trunc_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8c,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_trunc_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_trunc_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -100762,73 +102208,73 @@ v_trunc_f16_dpp v5, |v1| quad_perm:[0,1,
 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rndne_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8e,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_rndne_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_rndne_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -100918,73 +102364,73 @@ v_rndne_f16_dpp v5, |v1| quad_perm:[0,1,
 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_fract_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x90,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_fract_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_fract_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_fract_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -101074,73 +102520,73 @@ v_fract_f16_dpp v5, |v1| quad_perm:[0,1,
 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_sin_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x92,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_sin_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_sin_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_sin_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -101230,73 +102676,73 @@ v_sin_f16_dpp v5, |v1| quad_perm:[0,1,2,
 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cos_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x94,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_cos_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_cos_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_cos_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -101386,73 +102832,73 @@ v_cos_f16_dpp v5, |v1| quad_perm:[0,1,2,
 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x96,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_exp_legacy_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_exp_legacy_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -101542,73 +102988,73 @@ v_exp_legacy_f32_dpp v5, |v1| quad_perm:
 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x20,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_log_legacy_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0xfe,0x7f,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x98,0xfe,0x7f,0x01,0x06,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0xff,0x06,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0xff,0x06,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x26,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x26,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x00,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x00,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x01,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x01,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x02,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x02,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x03,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x03,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x04,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x04,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x05,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x05,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x0e,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x0e,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x16,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x16,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x06,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x06,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x00,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x00,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x01,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x01,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x02,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x02,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x03,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x03,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x04,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x04,0x00]
 
 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x05,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x05,0x00]
 
 v_log_legacy_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x16,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x16,0x00]
 
 v_log_legacy_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x26,0x06]
+// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x26,0x00]
 
 v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x00]
@@ -102861,9 +104307,6 @@ v_mul_hi_i32_i24_sdwa v5, v255, v2 dst_s
 v_mul_hi_i32_i24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0xfe,0x0b,0x0e,0x01,0x06,0x06,0x06]
 
-v_mul_hi_i32_i24_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x26,0x06,0x06]
-
 v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06]
 
@@ -103215,9 +104658,6 @@ v_mul_hi_u32_u24_sdwa v5, v255, v2 dst_s
 v_mul_hi_u32_u24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0xfe,0x0b,0x12,0x01,0x06,0x06,0x06]
 
-v_mul_hi_u32_u24_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x26,0x06,0x06]
-
 v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06]
 
@@ -103782,9 +105222,6 @@ v_min_i32_sdwa v5, v255, v2 dst_sel:DWOR
 v_min_i32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0xfe,0x0b,0x18,0x01,0x06,0x06,0x06]
 
-v_min_i32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x26,0x06,0x06]
-
 v_min_i32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06]
 
@@ -103959,9 +105396,6 @@ v_max_i32_sdwa v5, v255, v2 dst_sel:DWOR
 v_max_i32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0xfe,0x0b,0x1a,0x01,0x06,0x06,0x06]
 
-v_max_i32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x26,0x06,0x06]
-
 v_max_i32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06]
 
@@ -104136,9 +105570,6 @@ v_min_u32_sdwa v5, v255, v2 dst_sel:DWOR
 v_min_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0xfe,0x0b,0x1c,0x01,0x06,0x06,0x06]
 
-v_min_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x26,0x06,0x06]
-
 v_min_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06]
 
@@ -104313,9 +105744,6 @@ v_max_u32_sdwa v5, v255, v2 dst_sel:DWOR
 v_max_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0xfe,0x0b,0x1e,0x01,0x06,0x06,0x06]
 
-v_max_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x26,0x06,0x06]
-
 v_max_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06]
 
@@ -104664,9 +106092,6 @@ v_ashrrev_i32_sdwa v5, v255, v2 dst_sel:
 v_ashrrev_i32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0xfe,0x0b,0x22,0x01,0x06,0x06,0x06]
 
-v_ashrrev_i32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x26,0x06,0x06]
-
 v_ashrrev_i32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 // CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06]
 
@@ -105702,14126 +107127,12632 @@ v_mac_f32_dpp v5, v1, -v2 quad_perm:[0,1
 v_mac_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
 // CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x80,0x00]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
-
-v_addc_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x39,0x01,0x06,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0xff,0x06,0x06,0x06]
+v_add_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x33,0x01,0x06,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x38,0x01,0x06,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0xff,0x06,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x26,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x32,0x01,0x06,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x26,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x00,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x01,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x00,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x02,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x01,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x03,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x02,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x04,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x03,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x05,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x04,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x0e,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x05,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x0e,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x00,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x01,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x00,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x02,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x01,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x03,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x02,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x04,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x03,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x05,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x04,0x06]
 
-v_addc_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x0e,0x06]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x05,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
+v_add_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x0e,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x00]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x01]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x00]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x02]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x01]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x03]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x02]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x04]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x03]
 
-v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x05]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x04]
 
-v_addc_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x0e]
+v_add_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x05]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00]
+v_add_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x0e]
 
-v_addc_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x00]
 
-v_addc_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00]
+v_add_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x33,0x01,0xe4,0x00,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00]
+v_add_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0xff,0xe4,0x00,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00]
+v_add_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x32,0x01,0xe4,0x00,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x42,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x43,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x30,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x34,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x38,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x3c,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10]
+v_add_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0x00]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30]
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x10]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x30]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01]
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03]
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x01]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x03]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
 
-v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00]
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+v_add_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x08,0x00]
 
-v_subb_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x3b,0x01,0x06,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0xff,0x06,0x06,0x06]
+v_sub_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x35,0x01,0x06,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x3a,0x01,0x06,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0xff,0x06,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x26,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x34,0x01,0x06,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x26,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x00,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x01,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x00,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x02,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x01,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x03,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x02,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x04,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x03,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x05,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x04,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x0e,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x05,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x0e,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x00,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x01,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x00,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x02,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x01,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x03,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x02,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x04,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x03,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x05,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x04,0x06]
 
-v_subb_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x0e,0x06]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x05,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
+v_sub_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x0e,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x00]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x01]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x00]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x02]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x01]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x03]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x02]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x04]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x03]
 
-v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x05]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x04]
 
-v_subb_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x0e]
+v_sub_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x05]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00]
+v_sub_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x0e]
 
-v_subb_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x00]
 
-v_subb_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00]
+v_sub_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00]
+v_sub_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00]
+v_sub_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x34,0x01,0xe4,0x00,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x42,0x01,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x43,0x01,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x30,0x01,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x34,0x01,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x38,0x01,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x3c,0x01,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0x00]
 
-v_subb_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00]
-
-v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10]
-
-v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30]
-
-v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
-
-v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
-
-v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01]
-
-v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03]
-
-v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
-
-v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
-
-v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
-
-v_subbrev_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x3d,0x01,0x06,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0xff,0x06,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x3c,0x01,0x06,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x26,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x00,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x01,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x02,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x03,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x04,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x05,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x0e,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x00,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x01,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x02,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x03,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x04,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x05,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x0e,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x00]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x01]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x02]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x03]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x04]
-
-v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x05]
-
-v_subbrev_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x0e]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00]
-
-v_subbrev_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
-
-v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
-
-v_add_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x3f,0x01,0x06,0x06,0x06]
-
-v_add_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0xff,0x06,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x3e,0x01,0x06,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x26,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x00,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x01,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x02,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x03,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x04,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x05,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x0e,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x16,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x16,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x00,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x01,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x02,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x03,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x04,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x05,0x06]
-
-v_add_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x16,0x06]
-
-v_add_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x26,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x00]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x01]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x02]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x03]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x04]
-
-v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x05]
-
-v_add_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x16]
-
-v_add_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x26]
-
-v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x00]
-
-v_add_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x3f,0x01,0xe4,0x00,0x00]
-
-v_add_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0xff,0xe4,0x00,0x00]
-
-v_add_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x3e,0x01,0xe4,0x00,0x00]
-
-v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00]
-
-v_add_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x40,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x41,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x42,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x43,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x30,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x34,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x38,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x3c,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x01,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x0f,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x11,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x1f,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x21,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x2f,0x01,0x00]
-
-v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x10]
-
-v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x30]
-
-v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0xf0]
-
-v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0xf0]
-
-v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x01]
-
-v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x03]
-
-v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x0f]
-
-v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x0f]
-
-v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x08,0x00]
-
-v_add_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x10,0x00]
-
-v_add_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x20,0x00]
-
-v_add_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x40,0x00]
-
-v_add_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x80,0x00]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
-
-v_sub_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x41,0x01,0x06,0x06,0x06]
-
-v_sub_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0xff,0x06,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x40,0x01,0x06,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x26,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x00,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x01,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x02,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x03,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x04,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x05,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x0e,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x16,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x16,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x00,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x01,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x02,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x03,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x04,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x05,0x06]
-
-v_sub_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x16,0x06]
-
-v_sub_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x26,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x00]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x01]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x02]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x03]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x04]
-
-v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x05]
-
-v_sub_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x16]
-
-v_sub_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x26]
-
-v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x00]
-
-v_sub_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x41,0x01,0xe4,0x00,0x00]
-
-v_sub_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0xff,0xe4,0x00,0x00]
-
-v_sub_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x40,0x01,0xe4,0x00,0x00]
-
-v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0x00]
-
-v_sub_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x40,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x41,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x42,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x43,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x30,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x34,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x38,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x3c,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x01,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x0f,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x11,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x1f,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x21,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x2f,0x01,0x00]
-
-v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x10]
-
-v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x30]
-
-v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xf0]
-
-v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xf0]
-
-v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x01]
-
-v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x03]
-
-v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x0f]
-
-v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x0f]
-
-v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x08,0x00]
-
-v_sub_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x10,0x00]
-
-v_sub_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x20,0x00]
-
-v_sub_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x40,0x00]
-
-v_sub_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x80,0x00]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
-
-v_subrev_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x43,0x01,0x06,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0xff,0x06,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x42,0x01,0x06,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x26,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x00,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x01,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x02,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x03,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x04,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x05,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x0e,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x16,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x16,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x00,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x01,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x02,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x03,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x04,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x05,0x06]
-
-v_subrev_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x16,0x06]
-
-v_subrev_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x26,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x00]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x01]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x02]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x03]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x04]
-
-v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x05]
-
-v_subrev_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x16]
-
-v_subrev_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x26]
-
-v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x00]
-
-v_subrev_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x43,0x01,0xe4,0x00,0x00]
-
-v_subrev_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0xff,0xe4,0x00,0x00]
-
-v_subrev_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x42,0x01,0xe4,0x00,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x1b,0x00,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x40,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x41,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x42,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x43,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x30,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x34,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x38,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x3c,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x01,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x0f,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x11,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x1f,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x21,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x2f,0x01,0x00]
-
-v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x10]
-
-v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x30]
-
-v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xf0]
-
-v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xf0]
-
-v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x01]
-
-v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x03]
-
-v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x0f]
-
-v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x0f]
-
-v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x08,0x00]
-
-v_subrev_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x10,0x00]
-
-v_subrev_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x20,0x00]
-
-v_subrev_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x40,0x00]
-
-v_subrev_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x80,0x00]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
-
-v_mul_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x45,0x01,0x06,0x06,0x06]
-
-v_mul_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0xff,0x06,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x44,0x01,0x06,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x26,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x00,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x01,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x02,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x03,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x04,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x05,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x0e,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x16,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x16,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x00,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x01,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x02,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x03,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x04,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x05,0x06]
-
-v_mul_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x16,0x06]
-
-v_mul_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x26,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x00]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x01]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x02]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x03]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x04]
-
-v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x05]
-
-v_mul_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x16]
-
-v_mul_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x26]
-
-v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x00]
-
-v_mul_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x45,0x01,0xe4,0x00,0x00]
-
-v_mul_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0xff,0xe4,0x00,0x00]
-
-v_mul_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x44,0x01,0xe4,0x00,0x00]
-
-v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x1b,0x00,0x00]
-
-v_mul_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x40,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x41,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x42,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x43,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x30,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x34,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x38,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x3c,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x01,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x0f,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x11,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x1f,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x21,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x2f,0x01,0x00]
-
-v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x10]
-
-v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x30]
-
-v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xf0]
-
-v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xf0]
-
-v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x01]
-
-v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x03]
-
-v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x0f]
-
-v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x0f]
-
-v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x08,0x00]
-
-v_mul_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x10,0x00]
-
-v_mul_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x20,0x00]
-
-v_mul_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x40,0x00]
-
-v_mul_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x80,0x00]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x06]
-
-v_mac_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x47,0x01,0x06,0x06,0x06]
-
-v_mac_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0xff,0x06,0x06,0x06]
-
-v_mac_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x46,0x01,0x06,0x06,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x26,0x06,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x0e,0x06,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x16,0x06,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x16,0x06,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x00,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x01,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x02,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x03,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x04,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x05,0x06]
-
-v_mac_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x16,0x06]
-
-v_mac_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x26,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x06]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x00]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x01]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x02]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x03]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x04]
-
-v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x05]
-
-v_mac_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x16]
-
-v_mac_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x26]
-
-v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x00]
-
-v_mac_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x47,0x01,0xe4,0x00,0x00]
-
-v_mac_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0xff,0xe4,0x00,0x00]
-
-v_mac_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x46,0x01,0xe4,0x00,0x00]
-
-v_mac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x1b,0x00,0x00]
-
-v_mac_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x40,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x41,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x42,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x43,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x30,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x34,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x38,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x3c,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x01,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x0f,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x11,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x1f,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x21,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x2f,0x01,0x00]
-
-v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x10]
-
-v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x30]
-
-v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0xf0]
-
-v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0xf0]
-
-v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x01]
-
-v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x03]
-
-v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x0f]
-
-v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x0f]
-
-v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x08,0x00]
-
-v_mac_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x10,0x00]
-
-v_mac_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x20,0x00]
-
-v_mac_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x40,0x00]
-
-v_mac_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x80,0x00]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
-
-v_add_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x4d,0x01,0x06,0x06,0x06]
-
-v_add_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0xff,0x06,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x4c,0x01,0x06,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x26,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x00,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x01,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x02,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x03,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x04,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x05,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x0e,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x16,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x16,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x00,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x01,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x02,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x03,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x04,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x05,0x06]
-
-v_add_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x0e,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x00]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x01]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x02]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x03]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x04]
-
-v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x05]
-
-v_add_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x0e]
-
-v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x00]
-
-v_add_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x4d,0x01,0xe4,0x00,0x00]
-
-v_add_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0xff,0xe4,0x00,0x00]
-
-v_add_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x4c,0x01,0xe4,0x00,0x00]
-
-v_add_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x00,0x00]
-
-v_add_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x41,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x42,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x43,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x30,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x34,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x38,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x3c,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x01,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x0f,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x11,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x1f,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x21,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x2f,0x01,0x00]
-
-v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x10]
-
-v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x30]
-
-v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xf0]
-
-v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xf0]
-
-v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x01]
-
-v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x03]
-
-v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x0f]
-
-v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x0f]
-
-v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x08,0x00]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
-
-v_sub_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x4f,0x01,0x06,0x06,0x06]
-
-v_sub_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0xff,0x06,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x4e,0x01,0x06,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x26,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x00,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x01,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x02,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x03,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x04,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x05,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x0e,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x16,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x16,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x00,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x01,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x02,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x03,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x04,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x05,0x06]
-
-v_sub_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x0e,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x00]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x01]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x02]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x03]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x04]
-
-v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x05]
-
-v_sub_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x0e]
-
-v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x00]
-
-v_sub_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x4f,0x01,0xe4,0x00,0x00]
-
-v_sub_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0xff,0xe4,0x00,0x00]
-
-v_sub_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x4e,0x01,0xe4,0x00,0x00]
-
-v_sub_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x00,0x00]
-
-v_sub_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x40,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x41,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x42,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x43,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x30,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x34,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x38,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x3c,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x01,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x0f,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x11,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x21,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x2f,0x01,0x00]
-
-v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x10]
-
-v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x30]
-
-v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xf0]
-
-v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xf0]
-
-v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x01]
+v_sub_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0x00]
 
-v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x03]
+v_sub_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0x00]
 
-v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x0f]
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x10]
 
-v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x0f]
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x30]
 
-v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x08,0x00]
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
 
-v_subrev_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x51,0x01,0x06,0x06,0x06]
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x01]
 
-v_subrev_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0xff,0x06,0x06,0x06]
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x03]
 
-v_subrev_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x50,0x01,0x06,0x06,0x06]
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
 
-v_subrev_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x26,0x06,0x06]
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
+v_sub_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x08,0x00]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x00,0x06,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x01,0x06,0x06]
+v_subrev_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x37,0x01,0x06,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x02,0x06,0x06]
+v_subrev_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0xff,0x06,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x03,0x06,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x36,0x01,0x06,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x04,0x06,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x26,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x05,0x06,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x0e,0x06,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x00,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x16,0x06,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x01,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x16,0x06,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x02,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x03,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x00,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x04,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x01,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x05,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x02,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x0e,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x03,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x04,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x05,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
 
-v_subrev_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x0e,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x00,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x01,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x00]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x02,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x01]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x03,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x02]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x04,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x03]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x05,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x04]
+v_subrev_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x0e,0x06]
 
-v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x05]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
 
-v_subrev_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x0e]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x00]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x01]
 
-v_subrev_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x51,0x01,0xe4,0x00,0x00]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x02]
 
-v_subrev_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0xff,0xe4,0x00,0x00]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x03]
 
-v_subrev_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x50,0x01,0xe4,0x00,0x00]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x04]
 
-v_subrev_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00]
+v_subrev_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x05]
 
-v_subrev_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x40,0x01,0x00]
+v_subrev_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x0e]
 
-v_subrev_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x41,0x01,0x00]
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x42,0x01,0x00]
+v_subrev_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x43,0x01,0x00]
+v_subrev_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x30,0x01,0x00]
+v_subrev_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x36,0x01,0xe4,0x00,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x34,0x01,0x00]
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x38,0x01,0x00]
+v_subrev_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x3c,0x01,0x00]
+v_subrev_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x01,0x01,0x00]
+v_subrev_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x42,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x0f,0x01,0x00]
+v_subrev_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x43,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x11,0x01,0x00]
+v_subrev_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x30,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x1f,0x01,0x00]
+v_subrev_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x34,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x21,0x01,0x00]
+v_subrev_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x38,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x2f,0x01,0x00]
+v_subrev_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x3c,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x10]
+v_subrev_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x30]
+v_subrev_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0xf0]
+v_subrev_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0xf0]
+v_subrev_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x01]
+v_subrev_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x03]
+v_subrev_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0x00]
 
-v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0f]
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x10]
 
-v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0f]
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x30]
 
-v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x08,0x00]
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
 
-v_mul_lo_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x53,0x01,0x06,0x06,0x06]
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x01]
 
-v_mul_lo_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0xff,0x06,0x06,0x06]
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x03]
 
-v_mul_lo_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x52,0x01,0x06,0x06,0x06]
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
 
-v_mul_lo_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x26,0x06,0x06]
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
+v_subrev_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x08,0x00]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x00,0x06,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x01,0x06,0x06]
+v_addc_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x39,0x01,0x06,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x02,0x06,0x06]
+v_addc_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0xff,0x06,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x03,0x06,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x38,0x01,0x06,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x04,0x06,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x26,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x05,0x06,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x0e,0x06,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x00,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x16,0x06,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x01,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x16,0x06,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x02,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x03,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x00,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x04,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x01,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x05,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x02,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x0e,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x03,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x04,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x05,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x0e,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x00,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x01,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x00]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x02,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x01]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x03,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x02]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x04,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x03]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x05,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x04]
+v_addc_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x0e,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x05]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
 
-v_mul_lo_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x0e]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x00]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x01]
 
-v_mul_lo_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x53,0x01,0xe4,0x00,0x00]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x02]
 
-v_mul_lo_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0xff,0xe4,0x00,0x00]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x03]
 
-v_mul_lo_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x52,0x01,0xe4,0x00,0x00]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x04]
 
-v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00]
+v_addc_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x05]
 
-v_mul_lo_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x40,0x01,0x00]
+v_addc_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x0e]
 
-v_mul_lo_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x41,0x01,0x00]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x42,0x01,0x00]
+v_addc_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x43,0x01,0x00]
+v_addc_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x30,0x01,0x00]
+v_addc_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x34,0x01,0x00]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x38,0x01,0x00]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x3c,0x01,0x00]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x01,0x01,0x00]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x0f,0x01,0x00]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x11,0x01,0x00]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x1f,0x01,0x00]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x21,0x01,0x00]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x2f,0x01,0x00]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x10]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x30]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0xf0]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0xf0]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x01]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x03]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00]
 
-v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x0f]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10]
 
-v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x0f]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30]
 
-v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x08,0x00]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
 
-v_lshlrev_b16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x55,0x01,0x06,0x06,0x06]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01]
 
-v_lshlrev_b16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0xff,0x06,0x06,0x06]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03]
 
-v_lshlrev_b16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x54,0x01,0x06,0x06,0x06]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x00,0x06,0x06]
+v_addc_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x01,0x06,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x02,0x06,0x06]
+v_subb_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x3b,0x01,0x06,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x03,0x06,0x06]
+v_subb_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0xff,0x06,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x04,0x06,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x3a,0x01,0x06,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x05,0x06,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x26,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x0e,0x06,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x16,0x06,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x00,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x16,0x06,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x01,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x02,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x00,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x03,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x01,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x04,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x02,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x05,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x03,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x0e,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x04,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x05,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x0e,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x00,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x00]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x01,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x01]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x02,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x02]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x03,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x03]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x04,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x04]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x05,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x05]
+v_subb_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x0e,0x06]
 
-v_lshlrev_b16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x0e]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
 
-v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x00]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x00]
 
-v_lshlrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x55,0x01,0xe4,0x00,0x00]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x01]
 
-v_lshlrev_b16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0xff,0xe4,0x00,0x00]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x02]
 
-v_lshlrev_b16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x54,0x01,0xe4,0x00,0x00]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x03]
 
-v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x04]
 
-v_lshlrev_b16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x40,0x01,0x00]
+v_subb_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x05]
 
-v_lshlrev_b16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x41,0x01,0x00]
+v_subb_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x0e]
 
-v_lshlrev_b16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x42,0x01,0x00]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x43,0x01,0x00]
+v_subb_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x30,0x01,0x00]
+v_subb_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x34,0x01,0x00]
+v_subb_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x38,0x01,0x00]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x3c,0x01,0x00]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x01,0x01,0x00]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x0f,0x01,0x00]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x11,0x01,0x00]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x1f,0x01,0x00]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x21,0x01,0x00]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x2f,0x01,0x00]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x10]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x30]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0xf0]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0xf0]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x01]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x03]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x0f]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00]
 
-v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x0f]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10]
 
-v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x08,0x00]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
 
-v_lshrrev_b16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x57,0x01,0x06,0x06,0x06]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
 
-v_lshrrev_b16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0xff,0x06,0x06,0x06]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01]
 
-v_lshrrev_b16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x56,0x01,0x06,0x06,0x06]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x00,0x06,0x06]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x01,0x06,0x06]
+v_subb_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x02,0x06,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x03,0x06,0x06]
+v_subbrev_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x3d,0x01,0x06,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x04,0x06,0x06]
+v_subbrev_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0xff,0x06,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x05,0x06,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x3c,0x01,0x06,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x0e,0x06,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x26,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x16,0x06,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x16,0x06,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x00,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x01,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x00,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x02,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x01,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x03,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x02,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x04,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x03,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x05,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x04,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x0e,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x05,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x0e,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x00]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x00,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x01]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x01,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x02]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x02,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x03]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x03,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x04]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x04,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x05]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x05,0x06]
 
-v_lshrrev_b16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x0e]
+v_subbrev_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x0e,0x06]
 
-v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x00]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
 
-v_lshrrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x57,0x01,0xe4,0x00,0x00]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x00]
 
-v_lshrrev_b16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0xff,0xe4,0x00,0x00]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x01]
 
-v_lshrrev_b16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x56,0x01,0xe4,0x00,0x00]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x02]
 
-v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x03]
 
-v_lshrrev_b16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x40,0x01,0x00]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x04]
 
-v_lshrrev_b16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x41,0x01,0x00]
+v_subbrev_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x05]
 
-v_lshrrev_b16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x42,0x01,0x00]
+v_subbrev_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x0e]
 
-v_lshrrev_b16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x43,0x01,0x00]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x30,0x01,0x00]
+v_subbrev_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x34,0x01,0x00]
+v_subbrev_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x38,0x01,0x00]
+v_subbrev_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x3c,0x01,0x00]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x01,0x01,0x00]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x0f,0x01,0x00]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x11,0x01,0x00]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x1f,0x01,0x00]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x21,0x01,0x00]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x2f,0x01,0x00]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x10]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x30]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xf0]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xf0]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x01]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x03]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x0f]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x0f]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00]
 
-v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x08,0x00]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30]
 
-v_ashrrev_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x59,0x01,0x06,0x06,0x06]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
 
-v_ashrrev_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0xff,0x06,0x06,0x06]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
 
-v_ashrrev_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x58,0x01,0x06,0x06,0x06]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01]
 
-v_ashrrev_i16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x26,0x06,0x06]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x00,0x06,0x06]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x01,0x06,0x06]
+v_subbrev_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x02,0x06,0x06]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x03,0x06,0x06]
+v_add_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x3f,0x01,0x06,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x04,0x06,0x06]
+v_add_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0xff,0x06,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x05,0x06,0x06]
+v_add_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x3e,0x01,0x06,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x0e,0x06,0x06]
+v_add_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x26,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x16,0x06,0x06]
+v_add_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x16,0x06,0x06]
+v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x00,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
+v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x01,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x00,0x06]
+v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x02,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x01,0x06]
+v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x03,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x02,0x06]
+v_add_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x04,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x03,0x06]
+v_add_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x05,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x04,0x06]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x0e,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x05,0x06]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x16,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x0e,0x06]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x16,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x00]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x00,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x01]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x01,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x02]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x02,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x03]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x03,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x04]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x04,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x05]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x05,0x06]
 
-v_ashrrev_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x0e]
+v_add_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x16,0x06]
 
-v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x00]
+v_add_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x26,0x06]
 
-v_ashrrev_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x59,0x01,0xe4,0x00,0x00]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
 
-v_ashrrev_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0xff,0xe4,0x00,0x00]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x58,0x01,0xe4,0x00,0x00]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x01]
 
-v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x1b,0x00,0x00]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x02]
 
-v_ashrrev_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x40,0x01,0x00]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x03]
 
-v_ashrrev_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x41,0x01,0x00]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x04]
 
-v_ashrrev_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x42,0x01,0x00]
+v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x05]
 
-v_ashrrev_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x43,0x01,0x00]
+v_add_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x16]
 
-v_ashrrev_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x30,0x01,0x00]
+v_add_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x26]
 
-v_ashrrev_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x34,0x01,0x00]
+v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x38,0x01,0x00]
+v_add_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x3f,0x01,0xe4,0x00,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x3c,0x01,0x00]
+v_add_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0xff,0xe4,0x00,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x01,0x01,0x00]
+v_add_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x3e,0x01,0xe4,0x00,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x0f,0x01,0x00]
+v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x11,0x01,0x00]
+v_add_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x40,0x01,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x1f,0x01,0x00]
+v_add_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x41,0x01,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x21,0x01,0x00]
+v_add_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x42,0x01,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x2f,0x01,0x00]
+v_add_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x43,0x01,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x10]
+v_add_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x30,0x01,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x30]
+v_add_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x34,0x01,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0xf0]
+v_add_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x38,0x01,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0xf0]
+v_add_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x3c,0x01,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x01]
+v_add_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x01,0x01,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x03]
+v_add_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x0f,0x01,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x0f]
+v_add_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x11,0x01,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x0f]
+v_add_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x1f,0x01,0x00]
 
-v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x08,0x00]
+v_add_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x21,0x01,0x00]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
+v_add_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x2f,0x01,0x00]
 
-v_max_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x5b,0x01,0x06,0x06,0x06]
+v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x10]
 
-v_max_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0xff,0x06,0x06,0x06]
+v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x30]
 
-v_max_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x5a,0x01,0x06,0x06,0x06]
+v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0xf0]
 
-v_max_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x26,0x06,0x06]
+v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0xf0]
 
-v_max_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
+v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x01]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x00,0x06,0x06]
+v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x03]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x01,0x06,0x06]
+v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x0f]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x02,0x06,0x06]
+v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x0f]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x03,0x06,0x06]
+v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x08,0x00]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x04,0x06,0x06]
+v_add_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x10,0x00]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x05,0x06,0x06]
+v_add_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x20,0x00]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x0e,0x06,0x06]
+v_add_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x40,0x00]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x16,0x06,0x06]
+v_add_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x80,0x00]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x16,0x06,0x06]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
+v_sub_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x41,0x01,0x06,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x00,0x06]
+v_sub_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0xff,0x06,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x01,0x06]
+v_sub_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x40,0x01,0x06,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x02,0x06]
+v_sub_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x26,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x03,0x06]
+v_sub_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x04,0x06]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x00,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x05,0x06]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x01,0x06,0x06]
 
-v_max_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x16,0x06]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x02,0x06,0x06]
 
-v_max_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x26,0x06]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x03,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x04,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x00]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x05,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x01]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x0e,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x02]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x16,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x03]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x16,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x04]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
 
-v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x05]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x00,0x06]
 
-v_max_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x16]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x01,0x06]
 
-v_max_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x26]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x02,0x06]
 
-v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x00]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x03,0x06]
 
-v_max_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x5b,0x01,0xe4,0x00,0x00]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x04,0x06]
 
-v_max_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0xff,0xe4,0x00,0x00]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x05,0x06]
 
-v_max_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x5a,0x01,0xe4,0x00,0x00]
+v_sub_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x16,0x06]
 
-v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x1b,0x00,0x00]
+v_sub_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x26,0x06]
 
-v_max_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x40,0x01,0x00]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
 
-v_max_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x41,0x01,0x00]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x00]
 
-v_max_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x42,0x01,0x00]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x01]
 
-v_max_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x43,0x01,0x00]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x02]
 
-v_max_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x30,0x01,0x00]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x03]
 
-v_max_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x34,0x01,0x00]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x04]
 
-v_max_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x38,0x01,0x00]
+v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x05]
 
-v_max_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x3c,0x01,0x00]
+v_sub_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x16]
 
-v_max_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x01,0x01,0x00]
+v_sub_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x26]
 
-v_max_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x0f,0x01,0x00]
+v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x00]
 
-v_max_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x11,0x01,0x00]
+v_sub_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x41,0x01,0xe4,0x00,0x00]
 
-v_max_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x1f,0x01,0x00]
+v_sub_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0xff,0xe4,0x00,0x00]
 
-v_max_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x21,0x01,0x00]
+v_sub_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x40,0x01,0xe4,0x00,0x00]
 
-v_max_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x2f,0x01,0x00]
+v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0x00]
 
-v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x10]
+v_sub_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x40,0x01,0x00]
 
-v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x30]
+v_sub_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x41,0x01,0x00]
 
-v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0xf0]
+v_sub_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x42,0x01,0x00]
 
-v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0xf0]
+v_sub_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x43,0x01,0x00]
 
-v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x01]
+v_sub_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x30,0x01,0x00]
 
-v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x03]
+v_sub_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x34,0x01,0x00]
 
-v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x0f]
+v_sub_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x38,0x01,0x00]
 
-v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x0f]
+v_sub_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x3c,0x01,0x00]
 
-v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x08,0x00]
+v_sub_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x01,0x01,0x00]
 
-v_max_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x10,0x00]
+v_sub_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x0f,0x01,0x00]
 
-v_max_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x20,0x00]
+v_sub_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x11,0x01,0x00]
 
-v_max_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x40,0x00]
+v_sub_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x1f,0x01,0x00]
 
-v_max_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x80,0x00]
+v_sub_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x21,0x01,0x00]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
+v_sub_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x2f,0x01,0x00]
 
-v_min_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x5d,0x01,0x06,0x06,0x06]
+v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x10]
 
-v_min_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0xff,0x06,0x06,0x06]
+v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x30]
 
-v_min_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x5c,0x01,0x06,0x06,0x06]
+v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xf0]
 
-v_min_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x26,0x06,0x06]
+v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xf0]
 
-v_min_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
+v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x01]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x00,0x06,0x06]
+v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x03]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x01,0x06,0x06]
+v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x0f]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x02,0x06,0x06]
+v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x0f]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x03,0x06,0x06]
+v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x08,0x00]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x04,0x06,0x06]
+v_sub_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x10,0x00]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x05,0x06,0x06]
+v_sub_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x20,0x00]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x0e,0x06,0x06]
+v_sub_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x40,0x00]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x16,0x06,0x06]
+v_sub_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x80,0x00]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x16,0x06,0x06]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
+v_subrev_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x43,0x01,0x06,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x00,0x06]
+v_subrev_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0xff,0x06,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x01,0x06]
+v_subrev_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x42,0x01,0x06,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x02,0x06]
+v_subrev_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x26,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x03,0x06]
+v_subrev_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x04,0x06]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x00,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x05,0x06]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x01,0x06,0x06]
 
-v_min_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x16,0x06]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x02,0x06,0x06]
 
-v_min_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x26,0x06]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x03,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x04,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x00]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x05,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x01]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x0e,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x02]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x16,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x03]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x16,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x04]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
 
-v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x05]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x00,0x06]
 
-v_min_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x16]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x01,0x06]
 
-v_min_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x26]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x02,0x06]
 
-v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x00]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x03,0x06]
 
-v_min_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x5d,0x01,0xe4,0x00,0x00]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x04,0x06]
 
-v_min_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0xff,0xe4,0x00,0x00]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x05,0x06]
 
-v_min_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x5c,0x01,0xe4,0x00,0x00]
+v_subrev_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x16,0x06]
 
-v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x1b,0x00,0x00]
+v_subrev_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x26,0x06]
 
-v_min_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x40,0x01,0x00]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
 
-v_min_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x41,0x01,0x00]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x00]
 
-v_min_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x42,0x01,0x00]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x01]
 
-v_min_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x43,0x01,0x00]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x02]
 
-v_min_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x30,0x01,0x00]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x03]
 
-v_min_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x34,0x01,0x00]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x04]
 
-v_min_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x38,0x01,0x00]
+v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x05]
 
-v_min_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x3c,0x01,0x00]
+v_subrev_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x16]
 
-v_min_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x01,0x01,0x00]
+v_subrev_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x26]
 
-v_min_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x0f,0x01,0x00]
+v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x00]
 
-v_min_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x11,0x01,0x00]
+v_subrev_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x43,0x01,0xe4,0x00,0x00]
 
-v_min_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x1f,0x01,0x00]
+v_subrev_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0xff,0xe4,0x00,0x00]
 
-v_min_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x21,0x01,0x00]
+v_subrev_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x42,0x01,0xe4,0x00,0x00]
 
-v_min_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x2f,0x01,0x00]
+v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x1b,0x00,0x00]
 
-v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x10]
+v_subrev_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x40,0x01,0x00]
 
-v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x30]
+v_subrev_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x41,0x01,0x00]
 
-v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0xf0]
+v_subrev_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x42,0x01,0x00]
 
-v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0xf0]
+v_subrev_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x43,0x01,0x00]
 
-v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x01]
+v_subrev_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x30,0x01,0x00]
 
-v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x03]
+v_subrev_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x34,0x01,0x00]
 
-v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x0f]
+v_subrev_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x38,0x01,0x00]
 
-v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x0f]
+v_subrev_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x3c,0x01,0x00]
 
-v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x08,0x00]
+v_subrev_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x01,0x01,0x00]
 
-v_min_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x10,0x00]
+v_subrev_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x0f,0x01,0x00]
 
-v_min_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x20,0x00]
+v_subrev_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x11,0x01,0x00]
 
-v_min_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x40,0x00]
+v_subrev_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x1f,0x01,0x00]
 
-v_min_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x80,0x00]
+v_subrev_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x21,0x01,0x00]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
+v_subrev_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x2f,0x01,0x00]
 
-v_max_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x5f,0x01,0x06,0x06,0x06]
+v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x10]
 
-v_max_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0xff,0x06,0x06,0x06]
+v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x30]
 
-v_max_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x5e,0x01,0x06,0x06,0x06]
+v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xf0]
 
-v_max_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x26,0x06,0x06]
+v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xf0]
 
-v_max_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
+v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x01]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x00,0x06,0x06]
+v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x03]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x01,0x06,0x06]
+v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x0f]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x02,0x06,0x06]
+v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x0f]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x03,0x06,0x06]
+v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x08,0x00]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x04,0x06,0x06]
+v_subrev_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x10,0x00]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x05,0x06,0x06]
+v_subrev_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x20,0x00]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x0e,0x06,0x06]
+v_subrev_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x40,0x00]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x16,0x06,0x06]
+v_subrev_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x80,0x00]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x16,0x06,0x06]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
+v_mul_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x45,0x01,0x06,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x00,0x06]
+v_mul_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0xff,0x06,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x01,0x06]
+v_mul_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x44,0x01,0x06,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x02,0x06]
+v_mul_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x26,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x03,0x06]
+v_mul_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x04,0x06]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x00,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x05,0x06]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x01,0x06,0x06]
 
-v_max_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x0e,0x06]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x02,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x03,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x04,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x01]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x05,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x02]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x0e,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x03]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x16,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x04]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x16,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x05]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
 
-v_max_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x0e]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x00,0x06]
 
-v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x01,0x06]
 
-v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x5f,0x01,0xe4,0x00,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x02,0x06]
 
-v_max_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0xff,0xe4,0x00,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x03,0x06]
 
-v_max_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x5e,0x01,0xe4,0x00,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x04,0x06]
 
-v_max_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x1b,0x00,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x05,0x06]
 
-v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x40,0x01,0x00]
+v_mul_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x16,0x06]
 
-v_max_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x41,0x01,0x00]
+v_mul_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x26,0x06]
 
-v_max_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x42,0x01,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
 
-v_max_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x43,0x01,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x00]
 
-v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x30,0x01,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x01]
 
-v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x34,0x01,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x02]
 
-v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x38,0x01,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x03]
 
-v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x3c,0x01,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x04]
 
-v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x01,0x01,0x00]
+v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x05]
 
-v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x0f,0x01,0x00]
+v_mul_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x16]
 
-v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x11,0x01,0x00]
+v_mul_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x26]
 
-v_max_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x1f,0x01,0x00]
+v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x00]
 
-v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x21,0x01,0x00]
+v_mul_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x45,0x01,0xe4,0x00,0x00]
 
-v_max_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x2f,0x01,0x00]
+v_mul_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0xff,0xe4,0x00,0x00]
 
-v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x10]
+v_mul_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x44,0x01,0xe4,0x00,0x00]
 
-v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x30]
+v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x1b,0x00,0x00]
 
-v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xf0]
+v_mul_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x40,0x01,0x00]
 
-v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xf0]
+v_mul_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x41,0x01,0x00]
 
-v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x01]
+v_mul_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x42,0x01,0x00]
 
-v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x03]
+v_mul_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x43,0x01,0x00]
 
-v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x0f]
+v_mul_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x30,0x01,0x00]
 
-v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x0f]
+v_mul_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x34,0x01,0x00]
 
-v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x08,0x00]
+v_mul_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x38,0x01,0x00]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x3c,0x01,0x00]
 
-v_max_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x61,0x01,0x06,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x01,0x01,0x00]
 
-v_max_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0xff,0x06,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x0f,0x01,0x00]
 
-v_max_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x60,0x01,0x06,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x11,0x01,0x00]
 
-v_max_i16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x26,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x1f,0x01,0x00]
 
-v_max_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x21,0x01,0x00]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x00,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x2f,0x01,0x00]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x01,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x10]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x02,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x30]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x03,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xf0]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x04,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xf0]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x05,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x01]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x0e,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x03]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x16,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x0f]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x16,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x0f]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
+v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x08,0x00]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x00,0x06]
+v_mul_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x10,0x00]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x01,0x06]
+v_mul_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x20,0x00]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x02,0x06]
+v_mul_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x40,0x00]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x03,0x06]
+v_mul_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x80,0x00]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x04,0x06]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x06]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x05,0x06]
+v_mac_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x47,0x01,0x06,0x06,0x06]
 
-v_max_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x0e,0x06]
+v_mac_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0xff,0x06,0x06,0x06]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
+v_mac_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x46,0x01,0x06,0x06,0x06]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x00]
+v_mac_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x26,0x06,0x06]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x01]
+v_mac_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x06]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x02]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x0e,0x06,0x06]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x03]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x16,0x06,0x06]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x04]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x16,0x06,0x06]
 
-v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x05]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x06]
 
-v_max_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x0e]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x00,0x06]
 
-v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x00]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x01,0x06]
 
-v_max_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x61,0x01,0xe4,0x00,0x00]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x02,0x06]
 
-v_max_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0xff,0xe4,0x00,0x00]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x03,0x06]
 
-v_max_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x60,0x01,0xe4,0x00,0x00]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x04,0x06]
 
-v_max_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x1b,0x00,0x00]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x05,0x06]
 
-v_max_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x40,0x01,0x00]
+v_mac_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x16,0x06]
 
-v_max_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x41,0x01,0x00]
+v_mac_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x26,0x06]
 
-v_max_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x42,0x01,0x00]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x06]
 
-v_max_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x43,0x01,0x00]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x00]
 
-v_max_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x30,0x01,0x00]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x01]
 
-v_max_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x34,0x01,0x00]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x02]
 
-v_max_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x38,0x01,0x00]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x03]
 
-v_max_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x3c,0x01,0x00]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x04]
 
-v_max_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x01,0x01,0x00]
+v_mac_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x05]
 
-v_max_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x0f,0x01,0x00]
+v_mac_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x16]
 
-v_max_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x11,0x01,0x00]
+v_mac_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x46,0x01,0x06,0x06,0x26]
 
-v_max_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x1f,0x01,0x00]
+v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x00]
 
-v_max_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x21,0x01,0x00]
+v_mac_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x47,0x01,0xe4,0x00,0x00]
 
-v_max_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x2f,0x01,0x00]
+v_mac_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0xff,0xe4,0x00,0x00]
 
-v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x10]
+v_mac_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x46,0x01,0xe4,0x00,0x00]
 
-v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x30]
+v_mac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x1b,0x00,0x00]
 
-v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0xf0]
+v_mac_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x40,0x01,0x00]
 
-v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0xf0]
+v_mac_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x41,0x01,0x00]
 
-v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x01]
+v_mac_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x42,0x01,0x00]
 
-v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x03]
+v_mac_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x43,0x01,0x00]
 
-v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x0f]
+v_mac_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x30,0x01,0x00]
 
-v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x0f]
+v_mac_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x34,0x01,0x00]
 
-v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x08,0x00]
+v_mac_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x38,0x01,0x00]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x3c,0x01,0x00]
 
-v_min_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x63,0x01,0x06,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x01,0x01,0x00]
 
-v_min_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0xff,0x06,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x0f,0x01,0x00]
 
-v_min_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x62,0x01,0x06,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x11,0x01,0x00]
 
-v_min_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x26,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x1f,0x01,0x00]
 
-v_min_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x21,0x01,0x00]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x00,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x2f,0x01,0x00]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x01,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x10]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x02,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x30]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x03,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0xf0]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x04,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0xf0]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x05,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x01]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x0e,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x03]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x16,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x0f]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x16,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x0f]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
+v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x08,0x00]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x00,0x06]
+v_mac_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x10,0x00]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x01,0x06]
+v_mac_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x20,0x00]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x02,0x06]
+v_mac_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x40,0x00]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x03,0x06]
+v_mac_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x80,0x00]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x04,0x06]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x05,0x06]
+v_add_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x4d,0x01,0x06,0x06,0x06]
 
-v_min_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x0e,0x06]
+v_add_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0xff,0x06,0x06,0x06]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
+v_add_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x4c,0x01,0x06,0x06,0x06]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x00]
+v_add_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x26,0x06,0x06]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x01]
+v_add_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x02]
+v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x00,0x06,0x06]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x03]
+v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x01,0x06,0x06]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x04]
+v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x02,0x06,0x06]
 
-v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x05]
+v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x03,0x06,0x06]
 
-v_min_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x0e]
+v_add_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x04,0x06,0x06]
 
-v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x05,0x06,0x06]
 
-v_min_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x63,0x01,0xe4,0x00,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x0e,0x06,0x06]
 
-v_min_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0xff,0xe4,0x00,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x16,0x06,0x06]
 
-v_min_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x62,0x01,0xe4,0x00,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x16,0x06,0x06]
 
-v_min_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x1b,0x00,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
 
-v_min_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x40,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x00,0x06]
 
-v_min_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x41,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x01,0x06]
 
-v_min_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x42,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x02,0x06]
 
-v_min_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x43,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x03,0x06]
 
-v_min_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x30,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x04,0x06]
 
-v_min_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x34,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x05,0x06]
 
-v_min_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x38,0x01,0x00]
+v_add_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x0e,0x06]
 
-v_min_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x3c,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
 
-v_min_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x01,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x00]
 
-v_min_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x0f,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x01]
 
-v_min_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x11,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x02]
 
-v_min_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x1f,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x03]
 
-v_min_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x21,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x04]
 
-v_min_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x2f,0x01,0x00]
+v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x05]
 
-v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x10]
+v_add_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x0e]
 
-v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x30]
+v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x00]
 
-v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0xf0]
+v_add_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x4d,0x01,0xe4,0x00,0x00]
 
-v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0xf0]
+v_add_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0xff,0xe4,0x00,0x00]
 
-v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x01]
+v_add_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x4c,0x01,0xe4,0x00,0x00]
 
-v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x03]
+v_add_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x00,0x00]
 
-v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x0f]
+v_add_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00]
 
-v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x0f]
+v_add_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x41,0x01,0x00]
 
-v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x08,0x00]
+v_add_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x42,0x01,0x00]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x43,0x01,0x00]
 
-v_min_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x65,0x01,0x06,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x30,0x01,0x00]
 
-v_min_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0xff,0x06,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x34,0x01,0x00]
 
-v_min_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x64,0x01,0x06,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x38,0x01,0x00]
 
-v_min_i16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x26,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x3c,0x01,0x00]
 
-v_min_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x01,0x01,0x00]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x00,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x0f,0x01,0x00]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x01,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x11,0x01,0x00]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x02,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x1f,0x01,0x00]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x03,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x21,0x01,0x00]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x04,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x2f,0x01,0x00]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x05,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x10]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x0e,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x30]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x16,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xf0]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x16,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xf0]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
+v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x01]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x00,0x06]
+v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x03]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x01,0x06]
+v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x0f]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x02,0x06]
+v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x0f]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x03,0x06]
+v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x08,0x00]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x04,0x06]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x05,0x06]
+v_sub_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x4f,0x01,0x06,0x06,0x06]
 
-v_min_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x0e,0x06]
+v_sub_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0xff,0x06,0x06,0x06]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
+v_sub_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x4e,0x01,0x06,0x06,0x06]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x00]
+v_sub_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x26,0x06,0x06]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x01]
+v_sub_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x02]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x00,0x06,0x06]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x03]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x01,0x06,0x06]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x04]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x02,0x06,0x06]
 
-v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x05]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x03,0x06,0x06]
 
-v_min_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x0e]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x04,0x06,0x06]
 
-v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x05,0x06,0x06]
 
-v_min_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x65,0x01,0xe4,0x00,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x0e,0x06,0x06]
 
-v_min_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0xff,0xe4,0x00,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x16,0x06,0x06]
 
-v_min_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x64,0x01,0xe4,0x00,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x16,0x06,0x06]
 
-v_min_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
 
-v_min_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x40,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x00,0x06]
 
-v_min_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x41,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x01,0x06]
 
-v_min_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x42,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x02,0x06]
 
-v_min_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x43,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x03,0x06]
 
-v_min_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x30,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x04,0x06]
 
-v_min_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x34,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x05,0x06]
 
-v_min_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x38,0x01,0x00]
+v_sub_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x0e,0x06]
 
-v_min_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x3c,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
 
-v_min_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x01,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x00]
 
-v_min_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x0f,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x01]
 
-v_min_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x11,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x02]
 
-v_min_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x1f,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x03]
 
-v_min_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x21,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x04]
 
-v_min_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x2f,0x01,0x00]
+v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x05]
 
-v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x10]
+v_sub_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x0e]
 
-v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x30]
+v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x00]
 
-v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xf0]
+v_sub_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x4f,0x01,0xe4,0x00,0x00]
 
-v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xf0]
+v_sub_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0xff,0xe4,0x00,0x00]
 
-v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x01]
+v_sub_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x4e,0x01,0xe4,0x00,0x00]
 
-v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x03]
+v_sub_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x00,0x00]
 
-v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x0f]
+v_sub_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x40,0x01,0x00]
 
-v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x0f]
+v_sub_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x41,0x01,0x00]
 
-v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x08,0x00]
+v_sub_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x42,0x01,0x00]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x43,0x01,0x00]
 
-v_ldexp_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xfe,0x67,0x01,0x06,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x30,0x01,0x00]
 
-v_ldexp_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0xff,0x06,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x34,0x01,0x00]
 
-v_ldexp_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x0b,0x66,0x01,0x06,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x38,0x01,0x00]
 
-v_ldexp_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x26,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x3c,0x01,0x00]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x01,0x01,0x00]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x00,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x0f,0x01,0x00]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x01,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x11,0x01,0x00]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x02,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x03,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x21,0x01,0x00]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x04,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x2f,0x01,0x00]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x05,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x10]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x0e,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x30]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x16,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xf0]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x16,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xf0]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
+v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x01]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x00,0x06]
+v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x03]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x01,0x06]
+v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x0f]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x02,0x06]
+v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x0f]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x03,0x06]
+v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x08,0x00]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x04,0x06]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x05,0x06]
+v_subrev_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x51,0x01,0x06,0x06,0x06]
 
-v_ldexp_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x16,0x06]
+v_subrev_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0xff,0x06,0x06,0x06]
 
-v_ldexp_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x26,0x06]
+v_subrev_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x50,0x01,0x06,0x06,0x06]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
+v_subrev_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x26,0x06,0x06]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x01]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x00,0x06,0x06]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x02]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x01,0x06,0x06]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x03]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x02,0x06,0x06]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x04]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x03,0x06,0x06]
 
-v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x05]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x04,0x06,0x06]
 
-v_ldexp_f16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x0e]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x05,0x06,0x06]
 
-v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x0e,0x06,0x06]
 
-v_ldexp_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0xfe,0x67,0x01,0xe4,0x00,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x16,0x06,0x06]
 
-v_ldexp_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0xff,0xe4,0x00,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x16,0x06,0x06]
 
-v_ldexp_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0xfe,0x0b,0x66,0x01,0xe4,0x00,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
 
-v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x00,0x06]
 
-v_ldexp_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x40,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x01,0x06]
 
-v_ldexp_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x41,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x02,0x06]
 
-v_ldexp_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x42,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x03,0x06]
 
-v_ldexp_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x43,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x04,0x06]
 
-v_ldexp_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x30,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x05,0x06]
 
-v_ldexp_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x34,0x01,0x00]
+v_subrev_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x0e,0x06]
 
-v_ldexp_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x38,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
 
-v_ldexp_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x3c,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x00]
 
-v_ldexp_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x01,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x01]
 
-v_ldexp_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x0f,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x02]
 
-v_ldexp_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x11,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x03]
 
-v_ldexp_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x1f,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x04]
 
-v_ldexp_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x21,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x05]
 
-v_ldexp_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x2f,0x01,0x00]
+v_subrev_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x0e]
 
-v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x10]
+v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x00]
 
-v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x30]
+v_subrev_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x51,0x01,0xe4,0x00,0x00]
 
-v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xf0]
+v_subrev_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0xff,0xe4,0x00,0x00]
 
-v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xf0]
+v_subrev_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x50,0x01,0xe4,0x00,0x00]
 
-v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x01]
+v_subrev_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00]
 
-v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x03]
+v_subrev_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x40,0x01,0x00]
 
-v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x0f]
+v_subrev_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x41,0x01,0x00]
 
-v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x0f]
+v_subrev_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x42,0x01,0x00]
 
-v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x08,0x00]
+v_subrev_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x43,0x01,0x00]
 
-v_ldexp_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x10,0x00]
+v_subrev_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x30,0x01,0x00]
 
-v_ldexp_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
-// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x20,0x00]
+v_subrev_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x34,0x01,0x00]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x06,0x06]
+v_subrev_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x38,0x01,0x00]
 
-v_cmp_class_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0xff,0x16,0x06,0x06]
+v_subrev_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x3c,0x01,0x00]
 
-v_cmp_class_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x21,0x7c,0x01,0x16,0x06,0x06]
+v_subrev_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x01,0x01,0x00]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x06,0x06]
+v_subrev_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x0f,0x01,0x00]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x00,0x06]
+v_subrev_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x11,0x01,0x00]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x01,0x06]
+v_subrev_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x1f,0x01,0x00]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x02,0x06]
+v_subrev_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x21,0x01,0x00]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x03,0x06]
+v_subrev_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x2f,0x01,0x00]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x04,0x06]
+v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x10]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x05,0x06]
+v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x30]
 
-v_cmp_class_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x16,0x06]
+v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0xf0]
 
-v_cmp_class_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x26,0x06]
+v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0xf0]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x06,0x06]
+v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x01]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x06,0x00]
+v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x03]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x06,0x01]
+v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0f]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x06,0x02]
+v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0f]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x06,0x03]
+v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x08,0x00]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x06,0x04]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
 
-v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x06,0x05]
+v_mul_lo_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x53,0x01,0x06,0x06,0x06]
 
-v_cmp_class_f32_sdwa vcc, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x16,0x06,0x0e]
+v_mul_lo_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0xff,0x06,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x06,0x06]
+v_mul_lo_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x52,0x01,0x06,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0xff,0x16,0x06,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x23,0x7c,0x01,0x16,0x06,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x00,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x06,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x01,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x00,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x02,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x01,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x03,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x02,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x04,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x03,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x05,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x04,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x0e,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x05,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x16,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x16,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x16,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x26,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x06,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x00,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x06,0x00]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x01,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x06,0x01]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x02,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x06,0x02]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x03,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x06,0x03]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x04,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x06,0x04]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x05,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x06,0x05]
+v_mul_lo_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x0e,0x06]
 
-v_cmpx_class_f32_sdwa vcc, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x16,0x06,0x0e]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x06,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x00]
 
-v_cmp_class_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0xff,0x16,0x06,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x01]
 
-v_cmp_class_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x29,0x7c,0x01,0x16,0x06,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x02]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x06,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x03]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x00,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x04]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x01,0x06]
+v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x05]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x02,0x06]
+v_mul_lo_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x0e]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x03,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x00]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x04,0x06]
+v_mul_lo_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x53,0x01,0xe4,0x00,0x00]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x05,0x06]
+v_mul_lo_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0xff,0xe4,0x00,0x00]
 
-v_cmp_class_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x16,0x06]
+v_mul_lo_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x52,0x01,0xe4,0x00,0x00]
 
-v_cmp_class_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x26,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x06,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x40,0x01,0x00]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x06,0x00]
+v_mul_lo_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x41,0x01,0x00]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x06,0x01]
+v_mul_lo_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x42,0x01,0x00]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x06,0x02]
+v_mul_lo_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x43,0x01,0x00]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x06,0x03]
+v_mul_lo_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x30,0x01,0x00]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x06,0x04]
+v_mul_lo_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x34,0x01,0x00]
 
-v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x06,0x05]
+v_mul_lo_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x38,0x01,0x00]
 
-v_cmp_class_f16_sdwa vcc, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x16,0x06,0x0e]
+v_mul_lo_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x3c,0x01,0x00]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x06,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x01,0x01,0x00]
 
-v_cmpx_class_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0xff,0x16,0x06,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x0f,0x01,0x00]
 
-v_cmpx_class_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x2b,0x7c,0x01,0x16,0x06,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x11,0x01,0x00]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x06,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x1f,0x01,0x00]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x00,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x21,0x01,0x00]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x01,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x2f,0x01,0x00]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x02,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x10]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x03,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x30]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x04,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0xf0]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x05,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0xf0]
 
-v_cmpx_class_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x16,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x01]
 
-v_cmpx_class_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x26,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x03]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x06,0x06]
+v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x0f]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x06,0x00]
+v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x0f]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x06,0x01]
+v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x08,0x00]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x06,0x02]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x06,0x03]
+v_lshlrev_b16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x55,0x01,0x06,0x06,0x06]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x06,0x04]
+v_lshlrev_b16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0xff,0x06,0x06,0x06]
 
-v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x06,0x05]
+v_lshlrev_b16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x54,0x01,0x06,0x06,0x06]
 
-v_cmpx_class_f16_sdwa vcc, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x16,0x06,0x0e]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x06,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x00,0x06,0x06]
 
-v_cmp_f_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0xff,0x16,0x06,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x01,0x06,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x41,0x7c,0x01,0x16,0x06,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x02,0x06,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x36,0x06,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x03,0x06,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x06,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x04,0x06,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x00,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x05,0x06,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x01,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x0e,0x06,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x02,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x16,0x06,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x03,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x16,0x06,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x04,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x05,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x00,0x06]
 
-v_cmp_f_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x16,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x01,0x06]
 
-v_cmp_f_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x26,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x02,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x06,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x03,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x06,0x00]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x04,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x06,0x01]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x05,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x06,0x02]
+v_lshlrev_b16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x0e,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x06,0x03]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x06,0x04]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x00]
 
-v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x06,0x05]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x01]
 
-v_cmp_f_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x06,0x16]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x02]
 
-v_cmp_f_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x16,0x06,0x26]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x03]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x06,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x04]
 
-v_cmp_lt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0xff,0x16,0x06,0x06]
+v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x05]
 
-v_cmp_lt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x43,0x7c,0x01,0x16,0x06,0x06]
+v_lshlrev_b16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x0e]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x36,0x06,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x06,0x06]
+v_lshlrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x55,0x01,0xe4,0x00,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x00,0x06]
+v_lshlrev_b16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0xff,0xe4,0x00,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x01,0x06]
+v_lshlrev_b16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x54,0x01,0xe4,0x00,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x02,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x03,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x40,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x04,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x41,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x05,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x42,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x16,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x43,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x26,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x30,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x06,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x34,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x06,0x00]
+v_lshlrev_b16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x38,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x06,0x01]
+v_lshlrev_b16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x3c,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x06,0x02]
+v_lshlrev_b16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x01,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x06,0x03]
+v_lshlrev_b16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x0f,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x06,0x04]
+v_lshlrev_b16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x11,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x06,0x05]
+v_lshlrev_b16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x1f,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x06,0x16]
+v_lshlrev_b16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x21,0x01,0x00]
 
-v_cmp_lt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x16,0x06,0x26]
+v_lshlrev_b16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x2f,0x01,0x00]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x06,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x10]
 
-v_cmp_eq_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0xff,0x16,0x06,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x30]
 
-v_cmp_eq_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x45,0x7c,0x01,0x16,0x06,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0xf0]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x36,0x06,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0xf0]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x06,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x01]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x00,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x03]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x01,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x0f]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x02,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x0f]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x03,0x06]
+v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x08,0x00]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x04,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x05,0x06]
+v_lshrrev_b16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x57,0x01,0x06,0x06,0x06]
 
-v_cmp_eq_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x16,0x06]
+v_lshrrev_b16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0xff,0x06,0x06,0x06]
 
-v_cmp_eq_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x26,0x06]
+v_lshrrev_b16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x56,0x01,0x06,0x06,0x06]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x06,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
+
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x00,0x06,0x06]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x06,0x00]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x01,0x06,0x06]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x06,0x01]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x02,0x06,0x06]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x06,0x02]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x03,0x06,0x06]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x06,0x03]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x04,0x06,0x06]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x06,0x04]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x05,0x06,0x06]
 
-v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x06,0x05]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x0e,0x06,0x06]
 
-v_cmp_eq_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x06,0x16]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x16,0x06,0x06]
 
-v_cmp_eq_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x16,0x06,0x26]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x16,0x06,0x06]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x06,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
 
-v_cmp_le_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0xff,0x16,0x06,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x00,0x06]
 
-v_cmp_le_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x47,0x7c,0x01,0x16,0x06,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x01,0x06]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x36,0x06,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x02,0x06]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x06,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x03,0x06]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x00,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x04,0x06]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x01,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x05,0x06]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x02,0x06]
+v_lshrrev_b16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x0e,0x06]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x03,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x04,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x00]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x05,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x01]
 
-v_cmp_le_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x16,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x02]
 
-v_cmp_le_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x26,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x03]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x06,0x06]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x04]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x06,0x00]
+v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x05]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x06,0x01]
+v_lshrrev_b16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x0e]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x06,0x02]
+v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x00]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x06,0x03]
+v_lshrrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x57,0x01,0xe4,0x00,0x00]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x06,0x04]
+v_lshrrev_b16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0xff,0xe4,0x00,0x00]
 
-v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x06,0x05]
+v_lshrrev_b16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x56,0x01,0xe4,0x00,0x00]
 
-v_cmp_le_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x06,0x16]
+v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00]
 
-v_cmp_le_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x16,0x06,0x26]
+v_lshrrev_b16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x40,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x06,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x41,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0xff,0x16,0x06,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x42,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x49,0x7c,0x01,0x16,0x06,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x43,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x36,0x06,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x30,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x06,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x34,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x00,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x38,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x01,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x3c,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x02,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x01,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x03,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x0f,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x04,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x11,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x05,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x1f,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x16,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x21,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x26,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x2f,0x01,0x00]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x06,0x06]
+v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x10]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x06,0x00]
+v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x30]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x06,0x01]
+v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xf0]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x06,0x02]
+v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xf0]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x06,0x03]
+v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x01]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x06,0x04]
+v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x03]
 
-v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x06,0x05]
+v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x0f]
 
-v_cmp_gt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x06,0x16]
+v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x0f]
 
-v_cmp_gt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x16,0x06,0x26]
+v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x08,0x00]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x06,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0xff,0x16,0x06,0x06]
+v_ashrrev_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x59,0x01,0x06,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x4b,0x7c,0x01,0x16,0x06,0x06]
+v_ashrrev_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0xff,0x06,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x36,0x06,0x06]
+v_ashrrev_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x58,0x01,0x06,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x06,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x00,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x00,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x01,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x01,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x02,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x02,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x03,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x03,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x04,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x04,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x05,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x05,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x16,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x0e,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x26,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x16,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x06,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x16,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x06,0x00]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x06,0x01]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x00,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x06,0x02]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x01,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x06,0x03]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x02,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x06,0x04]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x03,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x06,0x05]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x04,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x06,0x16]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x05,0x06]
 
-v_cmp_lg_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x16,0x06,0x26]
+v_ashrrev_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x0e,0x06]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x06,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
 
-v_cmp_ge_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0xff,0x16,0x06,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x00]
 
-v_cmp_ge_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x4d,0x7c,0x01,0x16,0x06,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x01]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x36,0x06,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x02]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x06,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x03]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x00,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x04]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x01,0x06]
+v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x05]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x02,0x06]
+v_ashrrev_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x0e]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x03,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x00]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x04,0x06]
+v_ashrrev_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x59,0x01,0xe4,0x00,0x00]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x05,0x06]
+v_ashrrev_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0xff,0xe4,0x00,0x00]
 
-v_cmp_ge_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x16,0x06]
+v_ashrrev_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x58,0x01,0xe4,0x00,0x00]
 
-v_cmp_ge_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x26,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x1b,0x00,0x00]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x06,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x40,0x01,0x00]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x06,0x00]
+v_ashrrev_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x41,0x01,0x00]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x06,0x01]
+v_ashrrev_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x42,0x01,0x00]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x06,0x02]
+v_ashrrev_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x43,0x01,0x00]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x06,0x03]
+v_ashrrev_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x30,0x01,0x00]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x06,0x04]
+v_ashrrev_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x34,0x01,0x00]
 
-v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x06,0x05]
+v_ashrrev_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x38,0x01,0x00]
 
-v_cmp_ge_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x06,0x16]
+v_ashrrev_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x3c,0x01,0x00]
 
-v_cmp_ge_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x16,0x06,0x26]
+v_ashrrev_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x01,0x01,0x00]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x06,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x0f,0x01,0x00]
 
-v_cmp_o_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0xff,0x16,0x06,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x11,0x01,0x00]
 
-v_cmp_o_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x4f,0x7c,0x01,0x16,0x06,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x1f,0x01,0x00]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x36,0x06,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x21,0x01,0x00]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x06,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x2f,0x01,0x00]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x00,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x10]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x01,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x30]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x02,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0xf0]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x03,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0xf0]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x04,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x01]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x05,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x03]
 
-v_cmp_o_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x16,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x0f]
 
-v_cmp_o_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x26,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x0f]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x06,0x06]
+v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x08,0x00]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x06,0x00]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x06,0x01]
+v_max_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x5b,0x01,0x06,0x06,0x06]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x06,0x02]
+v_max_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0xff,0x06,0x06,0x06]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x06,0x03]
+v_max_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x5a,0x01,0x06,0x06,0x06]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x06,0x04]
+v_max_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x26,0x06,0x06]
 
-v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x06,0x05]
+v_max_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
 
-v_cmp_o_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x06,0x16]
+v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x00,0x06,0x06]
 
-v_cmp_o_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x16,0x06,0x26]
+v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x01,0x06,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x06,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x02,0x06,0x06]
 
-v_cmp_u_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0xff,0x16,0x06,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x03,0x06,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x51,0x7c,0x01,0x16,0x06,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x04,0x06,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x36,0x06,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x05,0x06,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x06,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x0e,0x06,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x00,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x16,0x06,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x01,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x16,0x06,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x02,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x03,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x00,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x04,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x01,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x05,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x02,0x06]
 
-v_cmp_u_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x16,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x03,0x06]
 
-v_cmp_u_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x26,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x04,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x06,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x05,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x06,0x00]
+v_max_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x16,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x06,0x01]
+v_max_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x26,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x06,0x02]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x06,0x03]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x00]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x06,0x04]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x01]
 
-v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x06,0x05]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x02]
 
-v_cmp_u_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x06,0x16]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x03]
 
-v_cmp_u_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x16,0x06,0x26]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x04]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x06,0x06]
+v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x05]
 
-v_cmp_nge_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0xff,0x16,0x06,0x06]
+v_max_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x16]
 
-v_cmp_nge_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x53,0x7c,0x01,0x16,0x06,0x06]
+v_max_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x26]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x36,0x06,0x06]
+v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x06,0x06]
+v_max_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x5b,0x01,0xe4,0x00,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x00,0x06]
+v_max_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0xff,0xe4,0x00,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x01,0x06]
+v_max_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x5a,0x01,0xe4,0x00,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x02,0x06]
+v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x1b,0x00,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x03,0x06]
+v_max_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x40,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x04,0x06]
+v_max_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x41,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x05,0x06]
+v_max_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x42,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x16,0x06]
+v_max_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x43,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x26,0x06]
+v_max_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x30,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x06,0x06]
+v_max_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x34,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x06,0x00]
+v_max_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x38,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x06,0x01]
+v_max_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x3c,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x06,0x02]
+v_max_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x01,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x06,0x03]
+v_max_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x0f,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x06,0x04]
+v_max_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x11,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x06,0x05]
+v_max_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x1f,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x06,0x16]
+v_max_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x21,0x01,0x00]
 
-v_cmp_nge_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x16,0x06,0x26]
+v_max_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x2f,0x01,0x00]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x06,0x06]
+v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x10]
 
-v_cmp_nlg_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0xff,0x16,0x06,0x06]
+v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x30]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x55,0x7c,0x01,0x16,0x06,0x06]
+v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0xf0]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x36,0x06,0x06]
+v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0xf0]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x06,0x06]
+v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x01]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x00,0x06]
+v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x03]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x01,0x06]
+v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x0f]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x02,0x06]
+v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x0f]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x03,0x06]
+v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x08,0x00]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x04,0x06]
+v_max_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x10,0x00]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x05,0x06]
+v_max_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x20,0x00]
 
-v_cmp_nlg_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x16,0x06]
+v_max_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x40,0x00]
 
-v_cmp_nlg_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x26,0x06]
+v_max_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x80,0x00]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x06,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x06,0x00]
+v_min_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x5d,0x01,0x06,0x06,0x06]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x06,0x01]
+v_min_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0xff,0x06,0x06,0x06]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x06,0x02]
+v_min_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x5c,0x01,0x06,0x06,0x06]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x06,0x03]
+v_min_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x26,0x06,0x06]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x06,0x04]
+v_min_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
 
-v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x06,0x05]
+v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x00,0x06,0x06]
 
-v_cmp_nlg_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x06,0x16]
+v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x01,0x06,0x06]
 
-v_cmp_nlg_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x16,0x06,0x26]
+v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x02,0x06,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x06,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x03,0x06,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0xff,0x16,0x06,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x04,0x06,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x57,0x7c,0x01,0x16,0x06,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x05,0x06,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x36,0x06,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x0e,0x06,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x06,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x16,0x06,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x00,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x16,0x06,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x01,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x02,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x00,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x03,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x01,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x04,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x02,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x05,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x03,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x16,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x04,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x26,0x06]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x05,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x06,0x06]
+v_min_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x16,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x06,0x00]
+v_min_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x26,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x06,0x01]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x06,0x02]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x00]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x06,0x03]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x01]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x06,0x04]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x02]
 
-v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x06,0x05]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x03]
 
-v_cmp_ngt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x06,0x16]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x04]
 
-v_cmp_ngt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x16,0x06,0x26]
+v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x05]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x06,0x06]
+v_min_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x16]
 
-v_cmp_nle_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0xff,0x16,0x06,0x06]
+v_min_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x26]
 
-v_cmp_nle_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x59,0x7c,0x01,0x16,0x06,0x06]
+v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x36,0x06,0x06]
+v_min_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x5d,0x01,0xe4,0x00,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x06,0x06]
+v_min_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0xff,0xe4,0x00,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x00,0x06]
+v_min_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x5c,0x01,0xe4,0x00,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x01,0x06]
+v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x1b,0x00,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x02,0x06]
+v_min_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x40,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x03,0x06]
+v_min_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x41,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x04,0x06]
+v_min_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x42,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x05,0x06]
+v_min_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x43,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x16,0x06]
+v_min_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x30,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x26,0x06]
+v_min_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x34,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x06,0x06]
+v_min_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x38,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x06,0x00]
+v_min_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x3c,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x06,0x01]
+v_min_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x01,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x06,0x02]
+v_min_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x0f,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x06,0x03]
+v_min_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x11,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x06,0x04]
+v_min_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x1f,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x06,0x05]
+v_min_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x21,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x06,0x16]
+v_min_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x2f,0x01,0x00]
 
-v_cmp_nle_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x16,0x06,0x26]
+v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x10]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x06,0x06]
+v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x30]
 
-v_cmp_neq_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0xff,0x16,0x06,0x06]
+v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0xf0]
 
-v_cmp_neq_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x5b,0x7c,0x01,0x16,0x06,0x06]
+v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0xf0]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x36,0x06,0x06]
+v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x01]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x06,0x06]
+v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x03]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x00,0x06]
+v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x0f]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x01,0x06]
+v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x0f]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x02,0x06]
+v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x08,0x00]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x03,0x06]
+v_min_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x10,0x00]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x04,0x06]
+v_min_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x20,0x00]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x05,0x06]
+v_min_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x40,0x00]
 
-v_cmp_neq_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x16,0x06]
+v_min_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x80,0x00]
 
-v_cmp_neq_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x26,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x06,0x06]
+v_max_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x5f,0x01,0x06,0x06,0x06]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x06,0x00]
+v_max_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0xff,0x06,0x06,0x06]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x06,0x01]
+v_max_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x5e,0x01,0x06,0x06,0x06]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x06,0x02]
+v_max_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x06,0x03]
+v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x00,0x06,0x06]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x06,0x04]
+v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x01,0x06,0x06]
 
-v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x06,0x05]
+v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x02,0x06,0x06]
 
-v_cmp_neq_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x06,0x16]
+v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x03,0x06,0x06]
 
-v_cmp_neq_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x16,0x06,0x26]
+v_max_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x04,0x06,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x06,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x05,0x06,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0xff,0x16,0x06,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x0e,0x06,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x5d,0x7c,0x01,0x16,0x06,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x16,0x06,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x36,0x06,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x16,0x06,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x06,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x00,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x00,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x01,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x01,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x02,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x02,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x03,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x03,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x04,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x04,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x05,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x05,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x16,0x06]
+v_max_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x0e,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x26,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x06,0x06]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x00]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x06,0x00]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x01]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x06,0x01]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x02]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x06,0x02]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x03]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x06,0x03]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x04]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x06,0x04]
+v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x05]
 
-v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x06,0x05]
+v_max_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x0e]
 
-v_cmp_nlt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x06,0x16]
+v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x00]
 
-v_cmp_nlt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x16,0x06,0x26]
+v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x5f,0x01,0xe4,0x00,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x06,0x06]
+v_max_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0xff,0xe4,0x00,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0xff,0x16,0x06,0x06]
+v_max_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x5e,0x01,0xe4,0x00,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x5f,0x7c,0x01,0x16,0x06,0x06]
+v_max_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x1b,0x00,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x36,0x06,0x06]
+v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x40,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x06,0x06]
+v_max_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x41,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x00,0x06]
+v_max_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x42,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x01,0x06]
+v_max_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x43,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x02,0x06]
+v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x30,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x03,0x06]
+v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x34,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x04,0x06]
+v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x38,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x05,0x06]
+v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x3c,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x16,0x06]
+v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x01,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x26,0x06]
+v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x0f,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x06,0x06]
+v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x11,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x06,0x00]
+v_max_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x1f,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x06,0x01]
+v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x21,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x06,0x02]
+v_max_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x2f,0x01,0x00]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x06,0x03]
+v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x10]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x06,0x04]
+v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x30]
 
-v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x06,0x05]
+v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xf0]
 
-v_cmp_tru_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x06,0x16]
+v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xf0]
 
-v_cmp_tru_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x16,0x06,0x26]
+v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x01]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x06,0x06]
+v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x03]
 
-v_cmpx_f_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0xff,0x16,0x06,0x06]
+v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x0f]
 
-v_cmpx_f_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x61,0x7c,0x01,0x16,0x06,0x06]
+v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x0f]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x36,0x06,0x06]
+v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x08,0x00]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x06,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x00,0x06]
+v_max_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x61,0x01,0x06,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x01,0x06]
+v_max_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0xff,0x06,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x02,0x06]
+v_max_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x60,0x01,0x06,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x03,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x04,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x00,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x05,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x01,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x16,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x02,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x26,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x03,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x06,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x04,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x06,0x00]
+v_max_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x05,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x06,0x01]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x0e,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x06,0x02]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x16,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x06,0x03]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x16,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x06,0x04]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x06,0x05]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x00,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x06,0x16]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x01,0x06]
 
-v_cmpx_f_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x16,0x06,0x26]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x02,0x06]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x06,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x03,0x06]
 
-v_cmpx_lt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0xff,0x16,0x06,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x04,0x06]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x63,0x7c,0x01,0x16,0x06,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x05,0x06]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x36,0x06,0x06]
+v_max_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x0e,0x06]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x06,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x00,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x00]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x01,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x01]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x02,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x02]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x03,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x03]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x04,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x04]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x05,0x06]
+v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x05]
 
-v_cmpx_lt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x16,0x06]
+v_max_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x0e]
 
-v_cmpx_lt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x26,0x06]
+v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x00]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x06,0x06]
+v_max_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x61,0x01,0xe4,0x00,0x00]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x06,0x00]
+v_max_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0xff,0xe4,0x00,0x00]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x06,0x01]
+v_max_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x60,0x01,0xe4,0x00,0x00]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x06,0x02]
+v_max_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x1b,0x00,0x00]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x06,0x03]
+v_max_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x40,0x01,0x00]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x06,0x04]
+v_max_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x41,0x01,0x00]
 
-v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x06,0x05]
+v_max_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x42,0x01,0x00]
 
-v_cmpx_lt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x06,0x16]
+v_max_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x43,0x01,0x00]
 
-v_cmpx_lt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x16,0x06,0x26]
+v_max_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x30,0x01,0x00]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x06,0x06]
+v_max_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x34,0x01,0x00]
 
-v_cmpx_eq_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0xff,0x16,0x06,0x06]
+v_max_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x38,0x01,0x00]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x65,0x7c,0x01,0x16,0x06,0x06]
+v_max_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x3c,0x01,0x00]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x36,0x06,0x06]
+v_max_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x01,0x01,0x00]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x06,0x06]
+v_max_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x0f,0x01,0x00]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x00,0x06]
+v_max_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x11,0x01,0x00]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x01,0x06]
+v_max_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x1f,0x01,0x00]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x02,0x06]
+v_max_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x21,0x01,0x00]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x03,0x06]
+v_max_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x2f,0x01,0x00]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x04,0x06]
+v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x10]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x05,0x06]
+v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x30]
 
-v_cmpx_eq_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x16,0x06]
+v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0xf0]
 
-v_cmpx_eq_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x26,0x06]
+v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0xf0]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x06,0x06]
+v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x01]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x06,0x00]
+v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x03]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x06,0x01]
+v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x0f]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x06,0x02]
+v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x0f]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x06,0x03]
+v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x08,0x00]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x06,0x04]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
 
-v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x06,0x05]
+v_min_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x63,0x01,0x06,0x06,0x06]
 
-v_cmpx_eq_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x06,0x16]
+v_min_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0xff,0x06,0x06,0x06]
 
-v_cmpx_eq_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x16,0x06,0x26]
+v_min_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x62,0x01,0x06,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x06,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0xff,0x16,0x06,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x00,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x67,0x7c,0x01,0x16,0x06,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x01,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x36,0x06,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x02,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x06,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x03,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x00,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x04,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x01,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x05,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x02,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x0e,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x03,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x16,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x04,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x16,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x05,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x16,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x00,0x06]
 
-v_cmpx_le_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x26,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x01,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x06,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x02,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x06,0x00]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x03,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x06,0x01]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x04,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x06,0x02]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x05,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x06,0x03]
+v_min_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x0e,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x06,0x04]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
 
-v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x06,0x05]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x00]
 
-v_cmpx_le_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x06,0x16]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x01]
 
-v_cmpx_le_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x16,0x06,0x26]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x02]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x06,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x03]
 
-v_cmpx_gt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0xff,0x16,0x06,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x04]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x69,0x7c,0x01,0x16,0x06,0x06]
+v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x05]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x36,0x06,0x06]
+v_min_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x0e]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x06,0x06]
+v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x00,0x06]
+v_min_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x63,0x01,0xe4,0x00,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x01,0x06]
+v_min_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0xff,0xe4,0x00,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x02,0x06]
+v_min_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x62,0x01,0xe4,0x00,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x03,0x06]
+v_min_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x1b,0x00,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x04,0x06]
+v_min_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x40,0x01,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x05,0x06]
+v_min_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x41,0x01,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x16,0x06]
+v_min_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x42,0x01,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x26,0x06]
+v_min_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x43,0x01,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x06,0x06]
+v_min_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x30,0x01,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x06,0x00]
+v_min_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x34,0x01,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x06,0x01]
+v_min_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x38,0x01,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x06,0x02]
+v_min_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x3c,0x01,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x06,0x03]
+v_min_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x01,0x01,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x06,0x04]
+v_min_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x0f,0x01,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x06,0x05]
+v_min_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x11,0x01,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x06,0x16]
+v_min_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x1f,0x01,0x00]
 
-v_cmpx_gt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x16,0x06,0x26]
+v_min_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x21,0x01,0x00]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x06,0x06]
+v_min_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x2f,0x01,0x00]
 
-v_cmpx_lg_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0xff,0x16,0x06,0x06]
+v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x10]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x6b,0x7c,0x01,0x16,0x06,0x06]
+v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x30]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x36,0x06,0x06]
+v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0xf0]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x06,0x06]
+v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0xf0]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x00,0x06]
+v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x01]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x01,0x06]
+v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x03]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x02,0x06]
+v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x0f]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x03,0x06]
+v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x0f]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x04,0x06]
+v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x08,0x00]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x05,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
 
-v_cmpx_lg_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x16,0x06]
+v_min_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x65,0x01,0x06,0x06,0x06]
 
-v_cmpx_lg_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x26,0x06]
+v_min_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0xff,0x06,0x06,0x06]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x06,0x06]
+v_min_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x64,0x01,0x06,0x06,0x06]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x06,0x00]
+v_min_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x06,0x01]
+v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x00,0x06,0x06]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x06,0x02]
+v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x01,0x06,0x06]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x06,0x03]
+v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x02,0x06,0x06]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x06,0x04]
+v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x03,0x06,0x06]
 
-v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x06,0x05]
+v_min_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x04,0x06,0x06]
 
-v_cmpx_lg_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x06,0x16]
+v_min_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x05,0x06,0x06]
 
-v_cmpx_lg_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x16,0x06,0x26]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x0e,0x06,0x06]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x06,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x16,0x06,0x06]
 
-v_cmpx_ge_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0xff,0x16,0x06,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x16,0x06,0x06]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x6d,0x7c,0x01,0x16,0x06,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x36,0x06,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x00,0x06]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x06,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x01,0x06]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x00,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x02,0x06]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x01,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x03,0x06]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x02,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x04,0x06]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x03,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x05,0x06]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x04,0x06]
+v_min_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x0e,0x06]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x05,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
 
-v_cmpx_ge_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x16,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x00]
 
-v_cmpx_ge_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x26,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x01]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x06,0x06]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x02]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x06,0x00]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x03]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x06,0x01]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x04]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x06,0x02]
+v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x05]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x06,0x03]
+v_min_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x0e]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x06,0x04]
+v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x00]
 
-v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x06,0x05]
+v_min_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x65,0x01,0xe4,0x00,0x00]
 
-v_cmpx_ge_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x06,0x16]
+v_min_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0xff,0xe4,0x00,0x00]
 
-v_cmpx_ge_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x16,0x06,0x26]
+v_min_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x64,0x01,0xe4,0x00,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x06,0x06]
+v_min_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0xff,0x16,0x06,0x06]
+v_min_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x40,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x6f,0x7c,0x01,0x16,0x06,0x06]
+v_min_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x41,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x36,0x06,0x06]
+v_min_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x42,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x06,0x06]
+v_min_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x43,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x00,0x06]
+v_min_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x30,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x01,0x06]
+v_min_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x34,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x02,0x06]
+v_min_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x38,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x03,0x06]
+v_min_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x3c,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x04,0x06]
+v_min_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x01,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x05,0x06]
+v_min_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x0f,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x16,0x06]
+v_min_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x11,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x26,0x06]
+v_min_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x1f,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x06,0x06]
+v_min_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x21,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x06,0x00]
+v_min_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x2f,0x01,0x00]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x06,0x01]
+v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x10]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x06,0x02]
+v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x30]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x06,0x03]
+v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xf0]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x06,0x04]
+v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xf0]
 
-v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x06,0x05]
+v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x01]
 
-v_cmpx_o_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x06,0x16]
+v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x03]
 
-v_cmpx_o_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x16,0x06,0x26]
+v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x0f]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x06,0x06]
+v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x0f]
 
-v_cmpx_u_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0xff,0x16,0x06,0x06]
+v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x08,0x00]
 
-v_cmpx_u_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x71,0x7c,0x01,0x16,0x06,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x36,0x06,0x06]
+v_ldexp_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0xfe,0x67,0x01,0x06,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x06,0x06]
+v_ldexp_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0xff,0x06,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x00,0x06]
+v_ldexp_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x0b,0x66,0x01,0x06,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x01,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x26,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x02,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x03,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x00,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x04,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x01,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x05,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x02,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x16,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x03,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x26,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x04,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x06,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x05,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x06,0x00]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x0e,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x06,0x01]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x16,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x06,0x02]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x16,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x06,0x03]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x06,0x04]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x00,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x06,0x05]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x01,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x06,0x16]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x02,0x06]
 
-v_cmpx_u_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x16,0x06,0x26]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x03,0x06]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x06,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x04,0x06]
 
-v_cmpx_nge_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0xff,0x16,0x06,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x05,0x06]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x73,0x7c,0x01,0x16,0x06,0x06]
+v_ldexp_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x16,0x06]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x36,0x06,0x06]
+v_ldexp_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x26,0x06]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x06,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x00,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x00]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x01,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x01]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x02,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x02]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x03,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x03]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x04,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x04]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x05,0x06]
+v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x05]
 
-v_cmpx_nge_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x16,0x06]
+v_ldexp_f16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x0e]
 
-v_cmpx_nge_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x26,0x06]
+v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x00]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x06,0x06]
+v_ldexp_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0xfe,0x67,0x01,0xe4,0x00,0x00]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x06,0x00]
+v_ldexp_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0xff,0xe4,0x00,0x00]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x06,0x01]
+v_ldexp_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0xfe,0x0b,0x66,0x01,0xe4,0x00,0x00]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x06,0x02]
+v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x06,0x03]
+v_ldexp_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x40,0x01,0x00]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x06,0x04]
+v_ldexp_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x41,0x01,0x00]
 
-v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x06,0x05]
+v_ldexp_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x42,0x01,0x00]
 
-v_cmpx_nge_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x06,0x16]
+v_ldexp_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x43,0x01,0x00]
 
-v_cmpx_nge_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x16,0x06,0x26]
+v_ldexp_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x30,0x01,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x06,0x06]
+v_ldexp_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x34,0x01,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0xff,0x16,0x06,0x06]
+v_ldexp_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x38,0x01,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x75,0x7c,0x01,0x16,0x06,0x06]
+v_ldexp_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x3c,0x01,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x36,0x06,0x06]
+v_ldexp_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x01,0x01,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x06,0x06]
+v_ldexp_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x0f,0x01,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x00,0x06]
+v_ldexp_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x11,0x01,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x01,0x06]
+v_ldexp_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x1f,0x01,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x02,0x06]
+v_ldexp_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x21,0x01,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x03,0x06]
+v_ldexp_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x2f,0x01,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x04,0x06]
+v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x10]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x05,0x06]
+v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x30]
 
-v_cmpx_nlg_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x16,0x06]
+v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xf0]
 
-v_cmpx_nlg_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x26,0x06]
+v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xf0]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x06,0x06]
+v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x01]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x06,0x00]
+v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x03]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x06,0x01]
+v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x0f]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x06,0x02]
+v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x0f]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x06,0x03]
+v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x08,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x06,0x04]
+v_ldexp_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x10,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x06,0x05]
+v_ldexp_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
+// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x20,0x00]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlg_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_class_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_class_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x21,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_class_f32_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x77,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_class_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_class_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_ngt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_class_f32_sdwa vcc, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x0e]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_class_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_class_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x23,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ngt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x79,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_class_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_class_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_nle_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_nle_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_class_f32_sdwa vcc, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x0e]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_class_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_class_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x29,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_class_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_nle_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x7b,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_class_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_class_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_neq_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_neq_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_class_f16_sdwa vcc, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x06,0x0e]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_class_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_class_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x2b,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_neq_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x7d,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_class_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_class_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_nlt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_class_f16_sdwa vcc, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x06,0x0e]
 
-v_cmpx_nlt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_f_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_f_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x41,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_f_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_f_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_nlt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_f_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x7f,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_f_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_f_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_tru_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_f_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_tru_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_lt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_lt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x43,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_lt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_tru_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_f_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_lt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x81,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_lt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_lt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_f_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_lt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_f_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_eq_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_eq_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x45,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_eq_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_f_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_eq_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x83,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_eq_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_eq_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_lt_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_eq_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_lt_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_le_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_le_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x47,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_le_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_le_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_lt_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_le_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x85,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_le_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_le_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_eq_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_le_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_eq_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_gt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_gt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x49,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_gt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_eq_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_le_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_gt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x87,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_gt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_gt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_le_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_gt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_le_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_lg_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_lg_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x4b,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_lg_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_le_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_lg_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x89,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_lg_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_lg_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_gt_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_lg_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_gt_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_ge_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_ge_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x4d,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_ge_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_gt_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_ge_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x8b,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_ge_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_ge_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_lg_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_ge_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_lg_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_o_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_o_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x4f,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_o_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_o_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_lg_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_o_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x8d,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_o_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_o_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_ge_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_o_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_ge_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_u_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_u_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x51,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_u_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_u_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_ge_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_o_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_u_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x8f,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_u_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_u_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_o_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_u_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_o_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nge_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_nge_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x53,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_nge_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_o_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_u_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_nge_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x91,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nge_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_nge_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_u_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_nge_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_u_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nlg_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_nlg_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x55,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_u_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_nlg_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x93,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nlg_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_nlg_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_nge_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_nlg_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_nge_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_ngt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_ngt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x57,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_nge_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_ngt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x95,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_ngt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_ngt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_nlg_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_ngt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_nlg_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nle_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_nle_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x59,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_nle_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_nlg_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_nle_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x97,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nle_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_nle_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_ngt_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_nle_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_ngt_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_neq_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_neq_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x5b,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_neq_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_ngt_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_neq_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x99,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_neq_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_neq_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_nle_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_neq_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_nle_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nlt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_nlt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x5d,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_nle_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_nlt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x9b,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nlt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_nlt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_neq_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_nlt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_neq_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_tru_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_tru_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x5f,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_tru_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_neq_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_tru_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x9d,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_tru_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_tru_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_nlt_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_tru_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_nlt_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_f_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_f_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x61,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_f_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_nlt_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_f_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x9f,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_f_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_f_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_tru_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_f_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_tru_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_lt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_lt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x63,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_tru_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_lt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xa1,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_lt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_lt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_f_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_lt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_f_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_eq_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_eq_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x65,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_f_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_eq_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xa3,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_eq_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_eq_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_lt_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_eq_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_lt_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_le_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_le_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x67,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_le_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_lt_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_le_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xa5,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_le_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_le_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_eq_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_le_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_eq_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_gt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_gt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x69,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_eq_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_gt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xa7,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_gt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_gt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_le_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_gt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_le_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_lg_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_lg_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x6b,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_le_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_lg_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xa9,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_lg_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_lg_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_gt_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_lg_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_gt_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_ge_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_ge_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x6d,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_gt_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_ge_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xab,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_ge_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_ge_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_lg_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_ge_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_lg_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_o_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_o_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x6f,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_o_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_lg_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_o_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xad,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_o_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_o_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_ge_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_o_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_ge_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_u_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_u_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x71,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_u_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_ge_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_u_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xaf,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_u_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_u_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_o_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_u_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_o_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nge_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_nge_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x73,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_o_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_nge_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xb1,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nge_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_nge_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_u_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_nge_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_u_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nlg_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_nlg_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x75,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_u_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_nlg_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xb3,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nlg_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_nlg_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_nge_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_nlg_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_nge_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_ngt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_ngt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x77,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_nge_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_ngt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xb5,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_ngt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_ngt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_nlg_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_ngt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_nlg_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nle_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_nle_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x79,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_nlg_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_nle_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xb7,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nle_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_nle_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_ngt_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_nle_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_ngt_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_neq_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_neq_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x7b,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_ngt_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_neq_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xb9,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_neq_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_neq_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_nle_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_neq_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_nle_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nlt_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_nlt_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x7d,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_nle_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_nlt_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xbb,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nlt_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_nlt_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_neq_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_nlt_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_neq_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x26,0x06]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_tru_f16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x06,0x00]
+v_cmpx_tru_f16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x7f,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x06,0x01]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x06,0x02]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x06,0x03]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x06,0x04]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x06,0x05]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x06,0x16]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_neq_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x16,0x06,0x26]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0xff,0x16,0x06,0x06]
+v_cmpx_tru_f16_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xbd,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_tru_f16_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x36,0x06,0x06]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x06,0x06]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x00,0x06]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x01,0x06]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x02,0x06]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x03,0x06]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x04,0x06]
+v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x05,0x06]
+v_cmpx_tru_f16_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_nlt_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x16,0x06]
+v_cmpx_tru_f16_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_nlt_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_f_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_f_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x81,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_f_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_f_f32_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_nlt_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0xff,0x16,0x06,0x06]
+v_cmp_f_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0xbf,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_f_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x36,0x06,0x06]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x00,0x06]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x01,0x06]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x02,0x06]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x03,0x06]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x04,0x06]
+v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x05,0x06]
+v_cmp_f_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmpx_tru_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x16,0x06]
+v_cmp_f_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmpx_tru_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x26,0x06]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x06,0x06]
+v_cmp_lt_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x06,0x00]
+v_cmp_lt_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x83,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x06,0x01]
+v_cmp_lt_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x06,0x02]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x06,0x03]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x06,0x04]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x06,0x05]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x06,0x16]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmpx_tru_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x16,0x06,0x26]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x06,0x06]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_f_i16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7d,0xff,0x16,0x06,0x06]
+v_cmp_lt_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_f_i16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x41,0x7d,0x01,0x16,0x06,0x06]
+v_cmp_lt_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x06,0x06]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x00,0x06]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x01,0x06]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x02,0x06]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x03,0x06]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x04,0x06]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x05,0x06]
+v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_f_i16_sdwa vcc, sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x0e,0x06]
+v_cmp_lt_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x06,0x06]
+v_cmp_lt_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x06,0x00]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x06,0x01]
+v_cmp_eq_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x06,0x02]
+v_cmp_eq_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x85,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x06,0x03]
+v_cmp_eq_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x06,0x04]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x06,0x05]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_f_i16_sdwa vcc, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x16,0x06,0x0e]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x01,0x06]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x06,0x06]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x02,0x06]
 
-v_cmp_lt_i16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7d,0xff,0x16,0x06,0x06]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x03,0x06]
 
-v_cmp_lt_i16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x43,0x7d,0x01,0x16,0x06,0x06]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x04,0x06]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x06,0x06]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x05,0x06]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x00,0x06]
+v_cmp_eq_f32_sdwa vcc, -v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x16,0x06]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x01,0x06]
+v_cmp_eq_f32_sdwa vcc, |v1|, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x26,0x06]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x02,0x06]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x03,0x06]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x06,0x00]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x04,0x06]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x06,0x01]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x05,0x06]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x06,0x02]
 
-v_cmp_lt_i16_sdwa vcc, sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x0e,0x06]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x06,0x03]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x06,0x06]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x06,0x04]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_0
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x06,0x00]
+v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x06,0x05]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_1
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x06,0x01]
+v_cmp_eq_f32_sdwa vcc, v1, -v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x06,0x16]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_2
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x06,0x02]
+v_cmp_eq_f32_sdwa vcc, v1, |v2| src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x06,0x26]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:BYTE_3
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x06,0x03]
+v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_0
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x06,0x04]
+v_cmp_le_f32_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x86,0x7c,0xff,0x00,0x06,0x06]
 
-v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_1
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x06,0x05]
+v_cmp_le_f32_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0xfe,0x87,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_lt_i16_sdwa vcc, v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x16,0x06,0x0e]
+v_cmp_le_f32_sdwa vcc, v1, v2 clamp src0_sel:DWORD src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x20,0x06,0x06]
 
-v_cmp_eq_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x16,0x06,0x06]
+v_cmp_le_f32_sdwa vcc, v1, v2 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x00,0x06,0x06]
 
-v_cmp_eq_i16_sdwa vcc, v255, v2 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0x04,0x44,0x7d,0xff,0x16,0x06,0x06]
+v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
+// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x00,0x00,0x06]
 
-v_cmp_eq_i16_sdwa vcc, v1, v255 src0_sel:DWORD src1_sel:DWORD
-// CHECK: [0xf9,0xfe,0x45,0x7d,0x01,0x16,0x06,0x06]
+v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD

[... 9231 lines stripped ...]



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