[PATCH] D44523: Change calculation of MaxVectorSize

[Krzysztof Parzyszek via Phabricator via llvm-commits]

kparzysz added a comment.

This is actually problematic for HVX because it creates short vectors.  In a loop with vectorizable operations on i16 and i32, this calculates the VF of 16, and (using cost model where everything is cheap) we have loads of <16 x i32> and loads of <16 x i16>.  The former is good, because it matches the HVX register size.  The second one is really bad, because the load is scalarized, which is highly expensive.  Expensive to the point that it negates any benefit from vectorizing anything.  In fact, with the cost reflected properly, the VF is calculated to be 2, which makes no use of HVX at all.

For us, the register pressure concern is pretty much a non-issue compared to the problems caused by unaligned short vectors.


Repository:
  rL LLVM

https://reviews.llvm.org/D44523