[PATCH] D44442: [X86] Teach X86TargetLowering::targetShrinkDemandedConstant to set non-demanded bits if it helps created an and mask that can be matched as a zero extend.

[Nirav Dave via Phabricator via llvm-commits]

niravd accepted this revision.
niravd added a comment.
This revision is now accepted and ready to land.

Is there any chance of the right shift needing this case as well?

In any case, this LGTM modulo nit.



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Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:4404
   case 0xFF000000: MaskByteOffset = 3; break;
+  case 0xFFFF:
+    // In case demanded bits didn't clear the bits that will be shifted out.
----------------
I think we should put this case right after the 0xFF00 case.


Repository:
  rL LLVM

https://reviews.llvm.org/D44442