[PATCH] D44401: [AMDGPU] Always use IDX for load/store format intrinsics.

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle added a comment.

We need tests for the store case as well.

I think it's fine to keep the existing intrinsics, but this causes a subtle change (or clarification) of semantics. Could you please add a comment in IntrinsicsAMDGPU.td explaining that buffer.{load,store}.format.* expects a buffer with stride != 0, while the non-format intrinsics expect a buffer with stride == 0?


Repository:
  rL LLVM

https://reviews.llvm.org/D44401