[PATCH] D44209: [mips] Fix the definitions of the EVA instructions

Simon Dardis via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 13 04:27:42 PDT 2018


sdardis added inline comments.


================
Comment at: lib/Target/Mips/MicroMipsInstrInfo.td:963-990
+let DecoderNamespace = "MicroMips" in {
   /// Trap Instructions
-  def TEQ_MM  : MMRel, TEQ_FT<"teq", GPR32Opnd, uimm4, II_TEQ>, TEQ_FM_MM<0x0>;
-  def TGE_MM  : MMRel, TEQ_FT<"tge", GPR32Opnd, uimm4, II_TGE>, TEQ_FM_MM<0x08>;
+  def TEQ_MM  : MMRel, TEQ_FT<"teq", GPR32Opnd, uimm4, II_TEQ>, TEQ_FM_MM<0x0>,
+                ISA_MICROMIPS;
+  def TGE_MM  : MMRel, TEQ_FT<"tge", GPR32Opnd, uimm4, II_TGE>, TEQ_FM_MM<0x08>,
+                ISA_MICROMIPS;
   def TGEU_MM : MMRel, TEQ_FT<"tgeu", GPR32Opnd, uimm4, II_TGEU>,
----------------
This change crept in from the next patch in the series, I'll remove it from this one.


================
Comment at: lib/Target/Mips/MipsInstrInfo.td:2069
            ISA_MIPS2_NOT_32R6_64R6;
+}
 
----------------
As did this.


================
Comment at: test/MC/Mips/micromips/valid.s:166-188
+                            # CHECK-NEXT:                   # <MCInst #{{[0-9]+}} TEQ_MM
 tge $8, $9                  # CHECK: tge $8, $9             # encoding: [0x01,0x28,0x02,0x3c]
+                            # CHECK-NEXT:                   # <MCInst #{{[0-9]+}} TGE_MM
 tgeu $8, $9                 # CHECK: tgeu $8, $9            # encoding: [0x01,0x28,0x04,0x3c]
+                            # CHECK-NEXT:                   # <MCInst #{{[0-9]+}} TGEU_MM
 tlt $8, $9                  # CHECK: tlt $8, $9             # encoding: [0x01,0x28,0x08,0x3c]
+                            # CHECK-NEXT:                   # <MCInst #{{[0-9]+}} TLT_MM
----------------
And this.


Repository:
  rL LLVM

https://reviews.llvm.org/D44209





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