[llvm] r327366 - bpf: J*_RR should check both operands

[Yonghong Song via llvm-commits]

Author: yhs
Date: Mon Mar 12 23:47:02 2018
New Revision: 327366

URL: http://llvm.org/viewvc/llvm-project?rev=327366&view=rev
Log:
bpf: J*_RR should check both operands

There is a mistake in current code that we "break" out the optimization
when the first operand of J*_RR doesn't qualify the elimination. This
caused some elimination opportunities missed, for example the one in the
testcase.

The code should just fall through to handle the second operand.

Signed-off-by: Jiong Wang <jiong.wang at netronome.com>
Signed-off-by: Yonghong Song <yhs at fb.com>

Modified:
    llvm/trunk/lib/Target/BPF/BPFMIPeephole.cpp
    llvm/trunk/test/CodeGen/BPF/32-bit-subreg-peephole.ll

Modified: llvm/trunk/lib/Target/BPF/BPFMIPeephole.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/BPFMIPeephole.cpp?rev=327366&r1=327365&r2=327366&view=diff
==============================================================================
--- llvm/trunk/lib/Target/BPF/BPFMIPeephole.cpp (original)
+++ llvm/trunk/lib/Target/BPF/BPFMIPeephole.cpp Mon Mar 12 23:47:02 2018
@@ -156,12 +156,10 @@ bool BPFMIPeephole::eliminateCmpPromotio
       case BPF::JNE_rr:
         Reg = MI.getOperand(1).getReg();
         Mov = getInsnDefZExtSubReg(Reg);
-        if (!Mov)
-          break;
-
-	updateInsnSeq(MBB, MI, Reg);
-	Eliminated = true;
-
+        if (Mov) {
+          updateInsnSeq(MBB, MI, Reg);
+          Eliminated = true;
+        }
         // Fallthrough
       case BPF::JUGT_ri:
       case BPF::JUGE_ri:

Modified: llvm/trunk/test/CodeGen/BPF/32-bit-subreg-peephole.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/BPF/32-bit-subreg-peephole.ll?rev=327366&r1=327365&r2=327366&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/BPF/32-bit-subreg-peephole.ll (original)
+++ llvm/trunk/test/CodeGen/BPF/32-bit-subreg-peephole.ll Mon Mar 12 23:47:02 2018
@@ -8,6 +8,14 @@
 ;     return d;
 ; }
 ;
+; long long select_u_2(unsigned a, unsigned long long b, long long c, long long d)
+; {
+;   if (a > b)
+;     return c;
+;   else
+;     return d;
+; }
+;
 ; long long select_s(signed a, signed b, long long c, long long d)
 ; {
 ;   if (a > b)
@@ -40,6 +48,18 @@ entry:
   ret i64 %c.d
 }
 
+; Function Attrs: norecurse nounwind readnone
+define dso_local i64 @select_u_2(i32 %a, i64 %b, i64 %c, i64 %d) local_unnamed_addr #0 {
+; CHECK-LABEL: select_u_2:
+entry:
+  %conv = zext i32 %a to i64
+; CHECK-NOT: r{{[0-9]+}} <<= 32
+; CHECK-NOT: r{{[0-9]+}} >>= 32
+  %cmp = icmp ugt i64 %conv, %b
+  %c.d = select i1 %cmp, i64 %c, i64 %d
+  ret i64 %c.d
+}
+
 ; Function Attrs: norecurse nounwind readnone
 define dso_local i64 @select_s(i32 %a, i32 %b, i64 %c, i64 %d) local_unnamed_addr #0 {
 ; CHECK-LABEL: select_s: