[PATCH] D41463: [CodeGen] Add a new pass for PostRA sink

Sebastian Pop via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 12 14:40:35 PDT 2018


sebpop added inline comments.


================
Comment at: lib/Target/AArch64/AArch64InstrInfo.cpp:4620
+      // WZR/XZR are not modified even when used as a destination register.
+      if (Reg != AArch64::WZR && Reg != AArch64::XZR)
+        for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
----------------
This check for the zero registers seems to be the only difference with the generic TII implementation.
I am thinking that this may be the case for other targets than aarch64.
You could avoid duplicating all the code in this function by checking the result of a function like
TII->canModifyRegister(Reg) or
TII->isReadOnly(Reg)



================
Comment at: test/CodeGen/Thumb2/ifcvt-no-branch-predictor.ll:121
 if.else:
-  store i32 %m, i32* %q, align 4
+  store i32 %n, i32* %q, align 4
   %0 = load i32, i32* %p, align 4
----------------
Why do you need to change the test here?


https://reviews.llvm.org/D41463





More information about the llvm-commits mailing list