[PATCH] D43971: [AArch64] Implement native TLS for Windows

[Martin Storsjö via Phabricator via llvm-commits]

mstorsjo added a comment.

In https://reviews.llvm.org/D43971#1030932, @rengolin wrote:

> I don't know much about COFF TLS to tell why you need the special treatment, but the AArch64 asm looks correct (though very inefficient, but you know that:).


Thanks for taking a look in any case!

Let's see if I can get some more progress on this if I turn it into a few more concrete questions:

First: Currently there's the pseudoinstruction LOADgot which lowers into a "adrp + ldr" instruction pair, but the ldr always loads a full X-register. Here I needed to do that, but load a W-register instead, to only read 32 bits. I tried to do this by adding a separate LOADgot32 pseudoinstruction, but I wasn't able to make it return a 32 bit value on the SelectionDAG level.

Secondly: When I do a series of SHL + ZERO_EXTEND + Load, I would want it lowered into a `ldr x0, [x0, w1 uxtw #3]`, but it ends up as `lsl w1, w1, #3; ldr x0, [x0, w1 uxtw]` which feels pointless. I remember doing similar things elsewhere, where it was folded properly into the ldr as a shift - what's missing here?

Who's familiar with the tablegen part of the AArch64 backend and/or SelectionDAG and can help out with this?


Repository:
  rL LLVM

https://reviews.llvm.org/D43971