[PATCH] D44134: [WebAssembly] Add WebAssemblyException information analysis

[Heejin Ahn via Phabricator via llvm-commits]

aheejin added inline comments.


================
Comment at: lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp:25-26
+/// Because CFGSort requires all the BBs within a catch part to be sorted
+/// together as it does for loops, this pass calculates the nesting structure of
+/// catch part of exceptions in a function.
+///
----------------
majnemer wrote:
> aheejin wrote:
> > majnemer wrote:
> > > aheejin wrote:
> > > > majnemer wrote:
> > > > > What happens if some BBs belong to two different catch blocks?
> > > > Like loop nesting structure, catch block structure should form a nested structure, so a BB belongs to both catch1 and catch2, catch1 should contain catch2 or vice versa.
> > > This is not so in LLVM IR. For example:
> > > 
> > > 
> > > ```
> > > define dso_local void @f() local_unnamed_addr #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
> > >   invoke void @x0()
> > >           to label %5 unwind label %1
> > > 
> > > ; <label>:1:                                      ; preds = %0
> > >   %2 = landingpad { i8*, i32 }
> > >           catch i8* null
> > >   %3 = extractvalue { i8*, i32 } %2, 0
> > >   %4 = tail call i8* @__cxa_begin_catch(i8* %3) #3
> > >   br label %11
> > > 
> > > ; <label>:5:                                      ; preds = %0
> > >   invoke void @x1()
> > >           to label %10 unwind label %6
> > > 
> > > ; <label>:6:                                      ; preds = %5
> > >   %7 = landingpad { i8*, i32 }
> > >           catch i8* null
> > >   %8 = extractvalue { i8*, i32 } %7, 0
> > >   %9 = tail call i8* @__cxa_begin_catch(i8* %8) #3
> > >   br label %11
> > > 
> > > ; <label>:10:                                     ; preds = %5
> > >   ret void
> > > 
> > > ; <label>:11:                                     ; preds = %6, %1
> > >   tail call void @abort() #4
> > >   unreachable
> > > }
> > > 
> > > declare dso_local void @x0() local_unnamed_addr #1
> > > 
> > > declare i32 @__gxx_personality_v0(...)
> > > 
> > > declare i8* @__cxa_begin_catch(i8*) local_unnamed_addr
> > > 
> > > declare dso_local void @x1() local_unnamed_addr #1
> > > 
> > > ; Function Attrs: noreturn nounwind
> > > declare dso_local void @abort() local_unnamed_addr #2
> > > ```
> > > 
> > > In this example, BB#11 belongs to two different catch blocks.
> > ```
> > An exception catch part is defined as a BB with catch instruction and all other BBs dominated by this BB.
> > ```
> > 
> > In this case BB#11 is neither in the two catch blocks. Catch#1 contains BB#6 and BB#11, and Catch#2 contains BB#2 only.
> Why doesn't Catch#2 contain BB#11? The two catches are identical, they just jump to a shared common block after executing __cxa_begin_catch.
What I meant by BB#11 belongs to neither of the catches was more about the real wasm code structure. Yes, it belongs to the catches semantically. But the wasm code will be like
```
(block
 (try
  ...
  catch
  ...
  br 1
 )
)
 ...
 (try
  ...
  catch
  ...
  br 1
 )
)
call @abort
```

This code is not specific to your code example; this is trying to show the simplest case that two catch blocks jump to the common code. This text format is called the folded text format in wasm, and the real wasm code does not have parentheses of course, but this format is easier to show scope information.

`br` is an unconditional branch instruction in wasm. The argument `1` means it breaks out of 2 scopes. (`br 0` means it breaks out of 1 scope.) So `br 1` within a `try` breaks out both the `try` scope and the outer `block` scope to get to the `call @abort` instruction.

So, unless you want to duplicate `call @abort` part, in should be located outside of the two catch blocks, and there should be a branch within each of the catches to jump to the shared code. An instance of `WebAssemblyExceptionInfo` represents BBs within a single `catch` in wasm code (`try` is not there yet, so just BBs starting from `catch`). This is the reason why it is defined as 'the landing pad BB and all other BBs dominated by it`.


Repository:
  rL LLVM

https://reviews.llvm.org/D44134