[PATCH] D43674: [TargetLowering] Add vector BITCAST support to SimplifyDemandedVectorElts

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

LGTM.



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Comment at: test/CodeGen/X86/vector-shuffle-256-v16.ll:4606-4609
 ; AVX1-NEXT:    vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; AVX1-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
+; AVX1-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7]
+; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
 ; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm0, %ymm0
----------------
RKSimon wrote:
> spatel wrote:
> > I haven't looked at this in a while, so not sure what's happening here, but this should just be:
> > vbroadcastss	(%rdi), %ymm0 ?
> Its only broadcasting the lower i16 of the i32, so no unfortunately - in fact I think the test was added to make sure we don't do this. 
Oops, I should've noticed that from the AVX2 code.


Repository:
  rL LLVM

https://reviews.llvm.org/D43674