[PATCH] D44045: [AMDGPU] Adjusted alignment-check for local address space;
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 2 17:48:47 PST 2018
arsenm requested changes to this revision.
arsenm added a comment.
This revision now requires changes to proceed.
I don't understand this. You should only be using the node's alignment here. If there's a way to infer a higher alignment for something, that should be an optimization much earlier than selection.
Comment at: test/CodeGen/AMDGPU/ds_read2.ll:661
+ %call = tail call i64 @hc_get_workitem_id(i32 0)
+ %conv = trunc i64 %call to i32
No reason to use an external function call here
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