[PATCH] D43903: [AArch64] generate vuzp instead of mov

Wed Feb 28 17:07:10 PST 2018

sebpop added a comment.

In https://reviews.llvm.org/D43903#1022945, @SjoerdMeijer wrote:

> Was just thinking though that we probably need some negative tests where we expect the rewrite not to happen? Because e.g.  the sequence has all even values except one value, if that makes sense.

I will prepare two more negative test-cases.  Thanks for pointing this out.

In https://reviews.llvm.org/D43903#1022977, @efriedma wrote:

> Should AArch64 define define isExtractSubvectorCheap()? See https://reviews.llvm.org/D27774 .

Yes. I think that makes sense: aarch64-neon should follow arm-neon.

This brings the question: do we want this vuzp pattern also recognized for arm-neon?

Repository:
  rL LLVM

https://reviews.llvm.org/D43903