[llvm] r326387 - [MIRParser] Accept overloaded intrinsic names w/o type suffixes

[Roman Tereshin via llvm-commits]

Author: rtereshin
Date: Wed Feb 28 15:51:49 2018
New Revision: 326387

URL: http://llvm.org/viewvc/llvm-project?rev=326387&view=rev
Log:
[MIRParser] Accept overloaded intrinsic names w/o type suffixes

Function::lookupIntrinsicID is somewhat forgiving as it comes to
overloaded intrinsics' names: it returns an ID as soon as the name
provided has a prefix that matches a registered intrinsic's name w/o
actually checking that the rest of the name encodes all the concrete arg
types, let alone that those types are compatible with the intrinsic's
definition.

That's probably fine and comes in handy in MIR serialization: we don't
care about IR types at MIR level and every intrinsic should be
selectable based on its ID and low-level types (LLTs) of its operands,
including the overloaded ones, so there is no point in serializing
mangled IR types as part of the intrinsic's name.

However, lookupIntrinsicID is somewhat inconsistent in its forgiveness:
if the name provided is actually an exact match, it will refuse to
return the ID if the intrinsic is overloaded. There is probably no
real reason for that and it renders MIRParser incapable to deserialize
MIR MIRPrinter serialized.

This commit fixes it.

Reviewers: rnk, aditya_nandakumar, qcolombet, thegameg, dsanders,
marcello.maggioni

Reviewed By: bogner

Subscribers: javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D43267

Added:
    llvm/trunk/test/CodeGen/MIR/AArch64/print-parse-overloaded-intrinsics.mir
Modified:
    llvm/trunk/lib/IR/Function.cpp

Modified: llvm/trunk/lib/IR/Function.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/IR/Function.cpp?rev=326387&r1=326386&r2=326387&view=diff
==============================================================================
--- llvm/trunk/lib/IR/Function.cpp (original)
+++ llvm/trunk/lib/IR/Function.cpp Wed Feb 28 15:51:49 2018
@@ -523,9 +523,11 @@ Intrinsic::ID Function::lookupIntrinsicI
   Intrinsic::ID ID = static_cast<Intrinsic::ID>(Idx + Adjust);
 
   // If the intrinsic is not overloaded, require an exact match. If it is
-  // overloaded, require a prefix match.
-  bool IsPrefixMatch = Name.size() > strlen(NameTable[Idx]);
-  return IsPrefixMatch == isOverloaded(ID) ? ID : Intrinsic::not_intrinsic;
+  // overloaded, require either exact or prefix match.
+  const auto MatchSize = strlen(NameTable[Idx]);
+  assert(Name.size() >= MatchSize && "Expected either exact or prefix match");
+  bool IsExactMatch = Name.size() == MatchSize;
+  return IsExactMatch || isOverloaded(ID) ? ID : Intrinsic::not_intrinsic;
 }
 
 void Function::recalculateIntrinsicID() {

Added: llvm/trunk/test/CodeGen/MIR/AArch64/print-parse-overloaded-intrinsics.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AArch64/print-parse-overloaded-intrinsics.mir?rev=326387&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/print-parse-overloaded-intrinsics.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/AArch64/print-parse-overloaded-intrinsics.mir Wed Feb 28 15:51:49 2018
@@ -0,0 +1,24 @@
+# RUN: llc -mtriple aarch64-- -run-pass irtranslator -simplify-mir %s -o %t \
+# RUN:   -verify-machineinstrs; llc -mtriple aarch64-- -run-pass legalizer \
+# RUN:   -simplify-mir %t -x mir -o - -verify-machineinstrs | FileCheck %s
+
+# Test that MIRParser is able to deserialize back MIR MIRPrinter serialized,
+# specifically overloaded intrinsic names in this case which aren't required
+# to encode all the concrete arg types in the name at MIR level.
+
+--- |
+  define i32 @int_aarch64_sdiv(i32 %a, i32 %b) nounwind readnone ssp {
+  ; CHECK-LABEL: name: int_aarch64_sdiv
+  ; CHECK: liveins: $w0, $w1
+  ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+  ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
+  ; CHECK: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.aarch64.sdiv), [[COPY]](s32), [[COPY1]](s32)
+  ; CHECK: $w0 = COPY [[INT]](s32)
+  ; CHECK: RET_ReallyLR implicit $w0
+  entry:
+    %sdiv = call i32 @llvm.aarch64.sdiv.i32(i32 %a, i32 %b)
+    ret i32 %sdiv
+  }
+
+  declare i32 @llvm.aarch64.sdiv.i32(i32, i32) nounwind readnone
+...