[PATCH] D42838: [AMDGPU] added writelane intrinsic

[Tim Renouf via Phabricator via llvm-commits]

tpr marked an inline comment as done.
tpr added inline comments.


================
Comment at: lib/Target/AMDGPU/SIMachineFunctionInfo.h:656-664
+  // During SGPR spilling to VGPR, determine if the VGPR is defined. The only
+  // circumstance in which we say it is undefined is when it is the first spill
+  // to this VGPR in the first basic block. This function relies on being called
+  // in code order in the first basic block by the SGPR spilling code.
+  bool isSGPRSpillVGPRDefined(const MachineBasicBlock *MBB, unsigned VGPR) {
+    if (&MBB->getParent()->front() != MBB)
+      return true; // not first basic block
----------------
nhaehnle wrote:
> I don't like this function. The name is misleading: it suggests a pure function ("is XXX"), but in reality there is a side effect; and the list of parameters is pretty surprising given the name as well.
> 
> Please just inline the function (including its comments) in the one single location where it is used, I think that will be much cleaner.
Will inline before landing.


Repository:
  rL LLVM

https://reviews.llvm.org/D42838