[llvm] r326320 - [GlobalIsel][X86] Support G_INTTOPTR instruction.
Alexander Ivchenko via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 28 04:11:53 PST 2018
Author: aivchenk
Date: Wed Feb 28 04:11:53 2018
New Revision: 326320
URL: http://llvm.org/viewvc/llvm-project?rev=326320&view=rev
Log:
[GlobalIsel][X86] Support G_INTTOPTR instruction.
Add legalization/selection for x86/x86_64 and
corresponding tests.
Reviewed By: igorb
Differential Revision: https://reviews.llvm.org/D43622
Added:
llvm/trunk/test/CodeGen/X86/GlobalISel/inttoptr.ll
llvm/trunk/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir
Modified:
llvm/trunk/lib/Target/X86/X86InstructionSelector.cpp
llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp
Modified: llvm/trunk/lib/Target/X86/X86InstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstructionSelector.cpp?rev=326320&r1=326319&r2=326320&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstructionSelector.cpp Wed Feb 28 04:11:53 2018
@@ -350,6 +350,8 @@ bool X86InstructionSelector::select(Mach
case TargetOpcode::G_PTRTOINT:
case TargetOpcode::G_TRUNC:
return selectTruncOrPtrToInt(I, MRI, MF);
+ case TargetOpcode::G_INTTOPTR:
+ return selectCopy(I, MRI);
case TargetOpcode::G_ZEXT:
return selectZext(I, MRI, MF);
case TargetOpcode::G_ANYEXT:
Modified: llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp?rev=326320&r1=326319&r2=326320&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp Wed Feb 28 04:11:53 2018
@@ -124,11 +124,13 @@ void X86LegalizerInfo::setLegalizerInfo3
setAction({G_GEP, p0}, Legal);
setAction({G_GEP, 1, s32}, Legal);
- if (!Subtarget.is64Bit())
+ if (!Subtarget.is64Bit()) {
getActionDefinitionsBuilder(G_PTRTOINT)
.legalForCartesianProduct({s1, s8, s16, s32}, {p0})
.maxScalar(0, s32)
.widenScalarToNextPow2(0, /*Min*/ 8);
+ getActionDefinitionsBuilder(G_INTTOPTR).legalFor({s32, p0});
+ }
// Control-flow
setAction({G_BRCOND, s1}, Legal);
@@ -194,6 +196,7 @@ void X86LegalizerInfo::setLegalizerInfo6
.legalForCartesianProduct({s1, s8, s16, s32, s64}, {p0})
.maxScalar(0, s64)
.widenScalarToNextPow2(0, /*Min*/ 8);
+ getActionDefinitionsBuilder(G_INTTOPTR).legalFor({s64, p0});
// Constants
setAction({TargetOpcode::G_CONSTANT, s64}, Legal);
Added: llvm/trunk/test/CodeGen/X86/GlobalISel/inttoptr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/inttoptr.ll?rev=326320&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/inttoptr.ll (added)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/inttoptr.ll Wed Feb 28 04:11:53 2018
@@ -0,0 +1,12 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
+
+define i64* @inttoptr_p0_s64(i64 %val) {
+; CHECK-LABEL: inttoptr_p0_s64:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: retq
+entry:
+ %0 = inttoptr i64 %val to i64*
+ ret i64* %0
+}
Added: llvm/trunk/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir?rev=326320&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir (added)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir Wed Feb 28 04:11:53 2018
@@ -0,0 +1,39 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=i686-linux-gnu -global-isel -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+
+--- |
+
+ define i32* @inttoptr_p0_s32(i32 %val) {
+ entry:
+ %0 = inttoptr i32 %val to i32*
+ ret i32* %0
+ }
+
+...
+---
+name: inttoptr_p0_s32
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+frameInfo:
+ maxAlignment: 4
+fixedStack:
+ - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+body: |
+ bb.1.entry:
+ ; CHECK-LABEL: name: inttoptr_p0_s32
+ ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
+ ; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load 4 from %fixed-stack.0, align 0)
+ ; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[LOAD]](s32)
+ ; CHECK: $eax = COPY [[INTTOPTR]](p0)
+ ; CHECK: RET 0, implicit $eax
+ %1:_(p0) = G_FRAME_INDEX %fixed-stack.0
+ %0:_(s32) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 0)
+ %2:_(p0) = G_INTTOPTR %0(s32)
+ $eax = COPY %2(p0)
+ RET 0, implicit $eax
+
+...
Added: llvm/trunk/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir?rev=326320&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir (added)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir Wed Feb 28 04:11:53 2018
@@ -0,0 +1,39 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=i386-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
+
+--- |
+
+ define i32* @inttoptr_p0_s32(i32 %val) {
+ entry:
+ %0 = inttoptr i32 %val to i32*
+ ret i32* %0
+ }
+
+...
+---
+name: inttoptr_p0_s32
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gpr }
+ - { id: 1, class: gpr }
+ - { id: 2, class: gpr }
+frameInfo:
+ maxAlignment: 4
+fixedStack:
+ - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+body: |
+ bb.1.entry:
+ ; CHECK-LABEL: name: inttoptr_p0_s32
+ ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 0)
+ ; CHECK: $eax = COPY [[MOV32rm]]
+ ; CHECK: RET 0, implicit $eax
+ %1:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
+ %0:gpr(s32) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 0)
+ %2:gpr(p0) = G_INTTOPTR %0(s32)
+ $eax = COPY %2(p0)
+ RET 0, implicit $eax
+
+...
Added: llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir?rev=326320&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir (added)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir Wed Feb 28 04:11:53 2018
@@ -0,0 +1,35 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+
+--- |
+
+ define i64* @inttoptr_p0_s64(i64 %val) {
+ entry:
+ %0 = inttoptr i64 %val to i64*
+ ret i64* %0
+ }
+
+...
+---
+name: inttoptr_p0_s64
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+body: |
+ bb.1.entry:
+ liveins: $rdi
+
+ ; CHECK-LABEL: name: inttoptr_p0_s64
+ ; CHECK: liveins: $rdi
+ ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi
+ ; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[COPY]](s64)
+ ; CHECK: $rax = COPY [[INTTOPTR]](p0)
+ ; CHECK: RET 0, implicit $rax
+ %0:_(s64) = COPY $rdi
+ %1:_(p0) = G_INTTOPTR %0(s64)
+ $rax = COPY %1(p0)
+ RET 0, implicit $rax
+
+...
Added: llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir?rev=326320&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir (added)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir Wed Feb 28 04:11:53 2018
@@ -0,0 +1,36 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
+
+--- |
+
+ define i64* @inttoptr_p0_s64(i64 %val) {
+ entry:
+ %0 = inttoptr i64 %val to i64*
+ ret i64* %0
+ }
+
+...
+---
+name: inttoptr_p0_s64
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gpr }
+ - { id: 1, class: gpr }
+body: |
+ bb.1.entry:
+ liveins: $rdi
+
+ ; CHECK-LABEL: name: inttoptr_p0_s64
+ ; CHECK: liveins: $rdi
+ ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
+ ; CHECK: $rax = COPY [[COPY]]
+ ; CHECK: RET 0, implicit $rax
+ %0:gpr(s64) = COPY $rdi
+ %1:gpr(p0) = G_INTTOPTR %0(s64)
+ $rax = COPY %1(p0)
+ RET 0, implicit $rax
+
+...
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