[PATCH] D43864: GlobalISel: IRTranslate llvm.fabs.* intrinsic

Volkan Keles via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 28 03:35:34 PST 2018


volkan created this revision.
volkan added reviewers: qcolombet, aditya_nandakumar, dsanders, rovka.
Herald added subscribers: javed.absar, kristof.beyls.

Fabs is a common floating-point operation, especially for some expansions. This patch adds
a new generic opcode for llvm.fabs.* intrinsic in order to avoid building/matching this intrinsic.


https://reviews.llvm.org/D43864

Files:
  include/llvm/CodeGen/TargetOpcodes.def
  include/llvm/Target/GenericOpcodes.td
  lib/CodeGen/GlobalISel/IRTranslator.cpp
  test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll


Index: test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
===================================================================
--- test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
+++ test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
@@ -1318,6 +1318,17 @@
   %res = call float @llvm.log2.f32(float %a)
   ret float %res
 }
+
+declare float @llvm.fabs.f32(float)
+define float @test_fabs_intrin(float %a) {
+; CHECK-LABEL: name: test_fabs_intrin
+; CHECK: [[A:%[0-9]+]]:_(s32) = COPY $s0
+; CHECK: [[RES:%[0-9]+]]:_(s32) = G_FABS [[A]]
+; CHECK: $s0 = COPY [[RES]]
+  %res = call float @llvm.fabs.f32(float %a)
+  ret float %res
+}
+
 declare void @llvm.lifetime.start.p0i8(i64, i8*)
 declare void @llvm.lifetime.end.p0i8(i64, i8*)
 define void @test_lifetime_intrin() {
Index: lib/CodeGen/GlobalISel/IRTranslator.cpp
===================================================================
--- lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -746,6 +746,11 @@
         .addDef(getOrCreateVReg(CI))
         .addUse(getOrCreateVReg(*CI.getArgOperand(0)));
     return true;
+  case Intrinsic::fabs:
+    MIRBuilder.buildInstr(TargetOpcode::G_FABS)
+        .addDef(getOrCreateVReg(CI))
+        .addUse(getOrCreateVReg(*CI.getArgOperand(0)));
+    return true;
   case Intrinsic::fma:
     MIRBuilder.buildInstr(TargetOpcode::G_FMA)
         .addDef(getOrCreateVReg(CI))
Index: include/llvm/Target/GenericOpcodes.td
===================================================================
--- include/llvm/Target/GenericOpcodes.td
+++ include/llvm/Target/GenericOpcodes.td
@@ -378,6 +378,12 @@
   let hasSideEffects = 0;
 }
 
+def G_FABS : GenericInstruction {
+  let OutOperandList = (outs type0:$dst);
+  let InOperandList = (ins type0:$src);
+  let hasSideEffects = 0;
+}
+
 //------------------------------------------------------------------------------
 // Floating Point Binary ops.
 //------------------------------------------------------------------------------
Index: include/llvm/CodeGen/TargetOpcodes.def
===================================================================
--- include/llvm/CodeGen/TargetOpcodes.def
+++ include/llvm/CodeGen/TargetOpcodes.def
@@ -427,6 +427,9 @@
 /// Generic unsigned-int to float conversion
 HANDLE_TARGET_OPCODE(G_UITOFP)
 
+/// Generic FP absolute value.
+HANDLE_TARGET_OPCODE(G_FABS)
+
 /// Generic pointer offset
 HANDLE_TARGET_OPCODE(G_GEP)
 


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