[PATCH] D43564: TableGen: Introduce an abstract variable resolver interface

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle added inline comments.


================
Comment at: include/llvm/TableGen/Record.h:1631
+
+  virtual bool keepUnsetBits() const { return false; }
+};
----------------
tra wrote:
> nhaehnle wrote:
> > tra wrote:
> > > Please describe the purpose of this function. It's not clear what are those unset bits and why would we want (or not) to keep them.
> > It's to do with keeping cross-references alive to represent instruction encodings. I'm adding a comment, see also http://nhaehnle.blogspot.de/2018/02/tablegen-3-bits.html
> Interesting. This feature does not seem to be mentioned anywhere in the docs. It probably should be, though I'm not sure where. We have bare-bones syntax doc, very simple language introduction, and the list of back-ends. We currently don't have any good place for describing how tablegen does things. 
> 
> After these patches you're officially going to be the only person who can claim to understand it. :-) Any chance you could write few pages (separately from this patch)  that would give people an idea of what to expect from tablegen? I.e. how name resolution works, special cases like references to bits, etc.  That would be extremely valuable, IMO.
> 
Agreed. I'm already writing up some parts for the blog I've been linking to, but it makes sense to put some of this stuff into docs/TableGen/ as well. I'll try to make some time for that.


Repository:
  rL LLVM

https://reviews.llvm.org/D43564