[llvm] r325989 - bpf: Enable 32-bit subregister support for -mattr=+alu32

[Yonghong Song via llvm-commits]

Author: yhs
Date: Fri Feb 23 15:49:30 2018
New Revision: 325989

URL: http://llvm.org/viewvc/llvm-project?rev=325989&view=rev
Log:
bpf: Enable 32-bit subregister support for -mattr=+alu32

After all those preparation patches, now we could enable 32-bit subregister
support once -mattr=+alu32 specified.

Signed-off-by: Jiong Wang <jiong.wang at netronome.com>
Reviewed-by: Yonghong Song <yhs at fb.com>

Modified:
    llvm/trunk/lib/Target/BPF/BPFISelLowering.cpp

Modified: llvm/trunk/lib/Target/BPF/BPFISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/BPFISelLowering.cpp?rev=325989&r1=325988&r2=325989&view=diff
==============================================================================
--- llvm/trunk/lib/Target/BPF/BPFISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/BPF/BPFISelLowering.cpp Fri Feb 23 15:49:30 2018
@@ -57,6 +57,8 @@ BPFTargetLowering::BPFTargetLowering(con
 
   // Set up the register classes.
   addRegisterClass(MVT::i64, &BPF::GPRRegClass);
+  if (STI.getHasAlu32())
+    addRegisterClass(MVT::i32, &BPF::GPR32RegClass);
 
   // Compute derived properties from the register classes
   computeRegisterProperties(STI.getRegisterInfo());