[llvm] r325954 - [Hexagon] Recognize non-immediate constants in HexagonConstPropagation

Krzysztof Parzyszek via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 23 12:33:26 PST 2018


Author: kparzysz
Date: Fri Feb 23 12:33:26 2018
New Revision: 325954

URL: http://llvm.org/viewvc/llvm-project?rev=325954&view=rev
Log:
[Hexagon] Recognize non-immediate constants in HexagonConstPropagation

Added:
    llvm/trunk/test/CodeGen/Hexagon/constp-andir-global.mir
Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonConstPropagation.cpp
    llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonConstPropagation.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonConstPropagation.cpp?rev=325954&r1=325953&r2=325954&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonConstPropagation.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonConstPropagation.cpp Fri Feb 23 12:33:26 2018
@@ -1880,10 +1880,7 @@ namespace {
   public:
     static char ID;
 
-    HexagonConstPropagation() : MachineFunctionPass(ID) {
-      PassRegistry &Registry = *PassRegistry::getPassRegistry();
-      initializeHexagonConstPropagationPass(Registry);
-    }
+    HexagonConstPropagation() : MachineFunctionPass(ID) {}
 
     StringRef getPassName() const override {
       return "Hexagon Constant Propagation";
@@ -1903,8 +1900,8 @@ namespace {
 
 char HexagonConstPropagation::ID = 0;
 
-INITIALIZE_PASS(HexagonConstPropagation, "hcp", "Hexagon Constant Propagation",
-                false, false)
+INITIALIZE_PASS(HexagonConstPropagation, "hexagon-constp",
+  "Hexagon Constant Propagation", false, false)
 
 HexagonConstEvaluator::HexagonConstEvaluator(MachineFunction &Fn)
   : MachineConstEvaluator(Fn),
@@ -2022,6 +2019,8 @@ bool HexagonConstEvaluator::evaluate(con
     case Hexagon::A2_combineii:  // combine(#s8Ext, #s8)
     case Hexagon::A4_combineii:  // combine(#s8, #u6Ext)
     {
+      if (!MI.getOperand(1).isImm() || !MI.getOperand(2).isImm())
+        return false;
       uint64_t Hi = MI.getOperand(1).getImm();
       uint64_t Lo = MI.getOperand(2).getImm();
       uint64_t Res = (Hi << 32) | (Lo & 0xFFFFFFFF);
@@ -2631,6 +2630,8 @@ bool HexagonConstEvaluator::evaluateHexL
       Eval = evaluateANDrr(R1, Register(Src2), Inputs, RC);
       break;
     case Hexagon::A2_andir: {
+      if (!Src2.isImm())
+        return false;
       APInt A(32, Src2.getImm(), true);
       Eval = evaluateANDri(R1, A, Inputs, RC);
       break;
@@ -2640,6 +2641,8 @@ bool HexagonConstEvaluator::evaluateHexL
       Eval = evaluateORrr(R1, Register(Src2), Inputs, RC);
       break;
     case Hexagon::A2_orir: {
+      if (!Src2.isImm())
+        return false;
       APInt A(32, Src2.getImm(), true);
       Eval = evaluateORri(R1, A, Inputs, RC);
       break;

Modified: llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp?rev=325954&r1=325953&r2=325954&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp Fri Feb 23 12:33:26 2018
@@ -123,6 +123,7 @@ namespace llvm {
   extern char &HexagonExpandCondsetsID;
   void initializeHexagonBitSimplifyPass(PassRegistry&);
   void initializeHexagonConstExtendersPass(PassRegistry&);
+  void initializeHexagonConstPropagationPass(PassRegistry&);
   void initializeHexagonEarlyIfConversionPass(PassRegistry&);
   void initializeHexagonExpandCondsetsPass(PassRegistry&);
   void initializeHexagonGenMuxPass(PassRegistry&);
@@ -188,6 +189,7 @@ extern "C" void LLVMInitializeHexagonTar
   PassRegistry &PR = *PassRegistry::getPassRegistry();
   initializeHexagonBitSimplifyPass(PR);
   initializeHexagonConstExtendersPass(PR);
+  initializeHexagonConstPropagationPass(PR);
   initializeHexagonEarlyIfConversionPass(PR);
   initializeHexagonGenMuxPass(PR);
   initializeHexagonHardwareLoopsPass(PR);

Added: llvm/trunk/test/CodeGen/Hexagon/constp-andir-global.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/constp-andir-global.mir?rev=325954&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/constp-andir-global.mir (added)
+++ llvm/trunk/test/CodeGen/Hexagon/constp-andir-global.mir Fri Feb 23 12:33:26 2018
@@ -0,0 +1,25 @@
+# RUN: llc -march=hexagon -run-pass hexagon-constp %s -o - | FileCheck %s
+
+# Check that this doesn't crash.
+# CHECK: A2_andir killed %{{[0-9]+}}, @g
+
+--- |
+  @g = external global i32, align 4
+  define void @fred() {
+    ret void
+  }
+...
+
+---
+name: fred
+tracksRegLiveness: true
+body: |
+  bb.0:
+    %1:intregs = IMPLICIT_DEF
+    %0:intregs = L2_loadri_io %1, 0
+    %2:intregs = A2_addi killed %0, -1
+    %3:intregs = A2_subri -1, killed %2
+    %4:intregs = A2_andir killed %3, @g
+    %5:intregs = IMPLICIT_DEF
+    S2_storeri_io %5, 0, killed %4
+...




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