[llvm] r325888 - [MIPS GlobalISel] Adding GlobalISel
Petar Jovanovic via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 23 03:06:40 PST 2018
Author: petarj
Date: Fri Feb 23 03:06:40 2018
New Revision: 325888
URL: http://llvm.org/viewvc/llvm-project?rev=325888&view=rev
Log:
[MIPS GlobalISel] Adding GlobalISel
Add GlobalISel infrastructure up to the point where we can select a ret
void.
Patch by Petar Avramovic.
Differential Revision: https://reviews.llvm.org/D43583
Added:
llvm/trunk/lib/Target/Mips/MipsCallLowering.cpp
llvm/trunk/lib/Target/Mips/MipsCallLowering.h
llvm/trunk/lib/Target/Mips/MipsInstructionSelector.cpp
llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp
llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.h
llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp
llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.h
llvm/trunk/test/CodeGen/Mips/GlobalISel/
llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/
llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/ret.ll
llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/
llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/ret.ll
Modified:
llvm/trunk/lib/Target/Mips/CMakeLists.txt
llvm/trunk/lib/Target/Mips/LLVMBuild.txt
llvm/trunk/lib/Target/Mips/Mips.h
llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
llvm/trunk/lib/Target/Mips/MipsSubtarget.h
llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
Modified: llvm/trunk/lib/Target/Mips/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/CMakeLists.txt?rev=325888&r1=325887&r2=325888&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/Mips/CMakeLists.txt Fri Feb 23 03:06:40 2018
@@ -23,21 +23,25 @@ add_llvm_target(MipsCodeGen
Mips16RegisterInfo.cpp
MipsAnalyzeImmediate.cpp
MipsAsmPrinter.cpp
+ MipsCallLowering.cpp
MipsCCState.cpp
MipsConstantIslandPass.cpp
MipsDelaySlotFiller.cpp
MipsFastISel.cpp
MipsHazardSchedule.cpp
MipsInstrInfo.cpp
+ MipsInstructionSelector.cpp
MipsISelDAGToDAG.cpp
MipsISelLowering.cpp
MipsFrameLowering.cpp
+ MipsLegalizerInfo.cpp
MipsLongBranch.cpp
MipsMCInstLower.cpp
MipsMachineFunction.cpp
MipsModuleISelDAGToDAG.cpp
MipsOptimizePICCall.cpp
MipsOs16.cpp
+ MipsRegisterBankInfo.cpp
MipsRegisterInfo.cpp
MipsSEFrameLowering.cpp
MipsSEInstrInfo.cpp
Modified: llvm/trunk/lib/Target/Mips/LLVMBuild.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/LLVMBuild.txt?rev=325888&r1=325887&r2=325888&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/LLVMBuild.txt (original)
+++ llvm/trunk/lib/Target/Mips/LLVMBuild.txt Fri Feb 23 03:06:40 2018
@@ -43,4 +43,5 @@ required_libraries =
SelectionDAG
Support
Target
+ GlobalISel
add_to_library_groups = Mips
Modified: llvm/trunk/lib/Target/Mips/Mips.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips.h?rev=325888&r1=325887&r2=325888&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips.h (original)
+++ llvm/trunk/lib/Target/Mips/Mips.h Fri Feb 23 03:06:40 2018
@@ -22,6 +22,10 @@ namespace llvm {
class MipsTargetMachine;
class ModulePass;
class FunctionPass;
+ class MipsRegisterBankInfo;
+ class MipsSubtarget;
+ class MipsTargetMachine;
+ class InstructionSelector;
ModulePass *createMipsOs16Pass();
ModulePass *createMips16HardFloatPass();
@@ -33,6 +37,10 @@ namespace llvm {
FunctionPass *createMipsLongBranchPass();
FunctionPass *createMipsConstantIslandPass();
FunctionPass *createMicroMipsSizeReductionPass();
+
+ InstructionSelector *createMipsInstructionSelector(const MipsTargetMachine &,
+ MipsSubtarget &,
+ MipsRegisterBankInfo &);
} // end namespace llvm;
#endif
Added: llvm/trunk/lib/Target/Mips/MipsCallLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsCallLowering.cpp?rev=325888&view=auto
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsCallLowering.cpp (added)
+++ llvm/trunk/lib/Target/Mips/MipsCallLowering.cpp Fri Feb 23 03:06:40 2018
@@ -0,0 +1,47 @@
+//===- MipsCallLowering.cpp -------------------------------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+/// \file
+/// This file implements the lowering of LLVM calls to machine code calls for
+/// GlobalISel.
+//
+//===----------------------------------------------------------------------===//
+
+#include "MipsCallLowering.h"
+#include "MipsISelLowering.h"
+#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
+
+using namespace llvm;
+
+MipsCallLowering::MipsCallLowering(const MipsTargetLowering &TLI)
+ : CallLowering(&TLI) {}
+
+bool MipsCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
+ const Value *Val, unsigned VReg) const {
+
+ MachineInstrBuilder Ret = MIRBuilder.buildInstrNoInsert(Mips::RetRA);
+
+ if (Val != nullptr) {
+ return false;
+ }
+ MIRBuilder.insertInstr(Ret);
+ return true;
+}
+
+bool MipsCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
+ const Function &F,
+ ArrayRef<unsigned> VRegs) const {
+
+ // Quick exit if there aren't any args.
+ if (F.arg_empty())
+ return true;
+
+ // Function had args, but we didn't lower them.
+ return false;
+}
Added: llvm/trunk/lib/Target/Mips/MipsCallLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsCallLowering.h?rev=325888&view=auto
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsCallLowering.h (added)
+++ llvm/trunk/lib/Target/Mips/MipsCallLowering.h Fri Feb 23 03:06:40 2018
@@ -0,0 +1,40 @@
+//===- MipsCallLowering.h ---------------------------------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+/// \file
+/// This file describes how to lower LLVM calls to machine code calls.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
+#define LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
+
+#include "llvm/CodeGen/CallingConvLower.h"
+#include "llvm/CodeGen/GlobalISel/CallLowering.h"
+#include "llvm/CodeGen/ValueTypes.h"
+
+namespace llvm {
+
+class MipsTargetLowering;
+
+class MipsCallLowering : public CallLowering {
+
+public:
+ MipsCallLowering(const MipsTargetLowering &TLI);
+
+ bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val,
+ unsigned VReg) const override;
+
+ bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
+ ArrayRef<unsigned> VRegs) const override;
+};
+
+} // end namespace llvm
+
+#endif // LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
Added: llvm/trunk/lib/Target/Mips/MipsInstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstructionSelector.cpp?rev=325888&view=auto
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstructionSelector.cpp (added)
+++ llvm/trunk/lib/Target/Mips/MipsInstructionSelector.cpp Fri Feb 23 03:06:40 2018
@@ -0,0 +1,66 @@
+//===- MipsInstructionSelector.cpp ------------------------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+/// \file
+/// This file implements the targeting of the InstructionSelector class for
+/// Mips.
+/// \todo This should be generated by TableGen.
+//===----------------------------------------------------------------------===//
+
+#include "MipsRegisterBankInfo.h"
+#include "MipsSubtarget.h"
+#include "MipsTargetMachine.h"
+#include "llvm/Support/Debug.h"
+
+using namespace llvm;
+
+namespace {
+
+class MipsInstructionSelector : public InstructionSelector {
+public:
+ MipsInstructionSelector(const MipsTargetMachine &TM, const MipsSubtarget &STI,
+ const MipsRegisterBankInfo &RBI);
+
+ bool select(MachineInstr &I, CodeGenCoverage &CoverageInfo) const override;
+
+private:
+ const MipsTargetMachine &TM;
+ const MipsSubtarget &STI;
+ const MipsInstrInfo &TII;
+ const MipsRegisterInfo &TRI;
+ const MipsRegisterBankInfo &RBI;
+};
+
+} // end anonymous namespace
+
+MipsInstructionSelector::MipsInstructionSelector(
+ const MipsTargetMachine &TM, const MipsSubtarget &STI,
+ const MipsRegisterBankInfo &RBI)
+ : InstructionSelector(), TM(TM), STI(STI), TII(*STI.getInstrInfo()),
+ TRI(*STI.getRegisterInfo()), RBI(RBI) {}
+
+bool MipsInstructionSelector::select(MachineInstr &I,
+ CodeGenCoverage &CoverageInfo) const {
+
+ if (!isPreISelGenericOpcode(I.getOpcode())) {
+ // Not global isel generic opcode.
+ // TODO: select copy
+ return true;
+ }
+
+ // We didn't select anything.
+ return false;
+}
+
+namespace llvm {
+InstructionSelector *createMipsInstructionSelector(const MipsTargetMachine &TM,
+ MipsSubtarget &Subtarget,
+ MipsRegisterBankInfo &RBI) {
+ return new MipsInstructionSelector(TM, Subtarget, RBI);
+}
+} // end namespace llvm
Added: llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp?rev=325888&view=auto
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp (added)
+++ llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp Fri Feb 23 03:06:40 2018
@@ -0,0 +1,24 @@
+//===- MipsLegalizerInfo.cpp ------------------------------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+/// \file
+/// This file implements the targeting of the Machinelegalizer class for Mips.
+/// \todo This should be generated by TableGen.
+//===----------------------------------------------------------------------===//
+
+#include "MipsLegalizerInfo.h"
+#include "llvm/CodeGen/TargetOpcodes.h"
+#include "llvm/CodeGen/ValueTypes.h"
+#include "llvm/IR/DerivedTypes.h"
+#include "llvm/IR/Type.h"
+
+using namespace llvm;
+
+MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) {
+ computeTables();
+}
Added: llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.h?rev=325888&view=auto
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.h (added)
+++ llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.h Fri Feb 23 03:06:40 2018
@@ -0,0 +1,29 @@
+//===- MipsLegalizerInfo ----------------------------------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+/// \file
+/// This file declares the targeting of the Machinelegalizer class for Mips.
+/// \todo This should be generated by TableGen.
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_MIPS_MIPSMACHINELEGALIZER_H
+#define LLVM_LIB_TARGET_MIPS_MIPSMACHINELEGALIZER_H
+
+#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
+
+namespace llvm {
+
+class MipsSubtarget;
+
+/// This class provides legalization strategies.
+class MipsLegalizerInfo : public LegalizerInfo {
+public:
+ MipsLegalizerInfo(const MipsSubtarget &ST);
+};
+} // end namespace llvm
+#endif
Added: llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp?rev=325888&view=auto
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp (added)
+++ llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp Fri Feb 23 03:06:40 2018
@@ -0,0 +1,26 @@
+//===- MipsRegisterBankInfo.cpp ---------------------------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+/// \file
+/// This file implements the targeting of the RegisterBankInfo class for Mips.
+/// \todo This should be generated by TableGen.
+//===----------------------------------------------------------------------===//
+
+#include "MipsRegisterBankInfo.h"
+#include "llvm/CodeGen/GlobalISel/RegisterBank.h"
+#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/TargetRegisterInfo.h"
+
+using namespace llvm;
+
+MipsGenRegisterBankInfo::MipsGenRegisterBankInfo()
+ : RegisterBankInfo(nullptr, 0) {}
+
+MipsRegisterBankInfo::MipsRegisterBankInfo(const TargetRegisterInfo &TRI)
+ : MipsGenRegisterBankInfo() {}
Added: llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.h?rev=325888&view=auto
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.h (added)
+++ llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.h Fri Feb 23 03:06:40 2018
@@ -0,0 +1,35 @@
+//===- MipsRegisterBankInfo.h -----------------------------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+/// \file
+/// This file declares the targeting of the RegisterBankInfo class for Mips.
+/// \todo This should be generated by TableGen.
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERBANKINFO_H
+#define LLVM_LIB_TARGET_MIPS_MIPSREGISTERBANKINFO_H
+
+#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
+
+namespace llvm {
+
+class TargetRegisterInfo;
+
+class MipsGenRegisterBankInfo : public RegisterBankInfo {
+// TODO: This should be auto-generated by TableGen.
+public:
+ MipsGenRegisterBankInfo();
+};
+
+/// This class provides the information for the target register banks.
+class MipsRegisterBankInfo final : public MipsGenRegisterBankInfo {
+public:
+ MipsRegisterBankInfo(const TargetRegisterInfo &TRI);
+};
+} // end namespace llvm
+#endif
Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=325888&r1=325887&r2=325888&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Fri Feb 23 03:06:40 2018
@@ -16,6 +16,9 @@
#include "MipsMachineFunction.h"
#include "MipsRegisterInfo.h"
#include "MipsTargetMachine.h"
+#include "MipsCallLowering.h"
+#include "MipsLegalizerInfo.h"
+#include "MipsRegisterBankInfo.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/Function.h"
#include "llvm/Support/CommandLine.h"
@@ -177,6 +180,14 @@ MipsSubtarget::MipsSubtarget(const Tripl
MSAWarningPrinted = true;
}
}
+
+ CallLoweringInfo.reset(new MipsCallLowering(*getTargetLowering()));
+ Legalizer.reset(new MipsLegalizerInfo(*this));
+
+ auto *RBI = new MipsRegisterBankInfo(*getRegisterInfo());
+ RegBankInfo.reset(RBI);
+ InstSelector.reset(createMipsInstructionSelector(
+ *static_cast<const MipsTargetMachine *>(&TM), *this, *RBI));
}
bool MipsSubtarget::isPositionIndependent() const {
@@ -234,3 +245,19 @@ bool MipsSubtarget::isABI_N64() const {
bool MipsSubtarget::isABI_N32() const { return getABI().IsN32(); }
bool MipsSubtarget::isABI_O32() const { return getABI().IsO32(); }
const MipsABIInfo &MipsSubtarget::getABI() const { return TM.getABI(); }
+
+const CallLowering *MipsSubtarget::getCallLowering() const {
+ return CallLoweringInfo.get();
+}
+
+const LegalizerInfo *MipsSubtarget::getLegalizerInfo() const {
+ return Legalizer.get();
+}
+
+const RegisterBankInfo *MipsSubtarget::getRegBankInfo() const {
+ return RegBankInfo.get();
+}
+
+const InstructionSelector *MipsSubtarget::getInstructionSelector() const {
+ return InstSelector.get();
+}
Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=325888&r1=325887&r2=325888&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Fri Feb 23 03:06:40 2018
@@ -20,6 +20,10 @@
#include "MipsInstrInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
+#include "llvm/CodeGen/GlobalISel/CallLowering.h"
+#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
+#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
+#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/Support/ErrorHandling.h"
@@ -349,6 +353,19 @@ public:
const InstrItineraryData *getInstrItineraryData() const override {
return &InstrItins;
}
+
+protected:
+ // GlobalISel related APIs.
+ std::unique_ptr<CallLowering> CallLoweringInfo;
+ std::unique_ptr<LegalizerInfo> Legalizer;
+ std::unique_ptr<RegisterBankInfo> RegBankInfo;
+ std::unique_ptr<InstructionSelector> InstSelector;
+
+public:
+ const CallLowering *getCallLowering() const override;
+ const LegalizerInfo *getLegalizerInfo() const override;
+ const RegisterBankInfo *getRegBankInfo() const override;
+ const InstructionSelector *getInstructionSelector() const override;
};
} // End llvm namespace
Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=325888&r1=325887&r2=325888&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Fri Feb 23 03:06:40 2018
@@ -23,6 +23,10 @@
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Analysis/TargetTransformInfo.h"
+#include "llvm/CodeGen/GlobalISel/IRTranslator.h"
+#include "llvm/CodeGen/GlobalISel/Legalizer.h"
+#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
+#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
#include "llvm/CodeGen/BasicTTIImpl.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h"
@@ -46,6 +50,9 @@ extern "C" void LLVMInitializeMipsTarget
RegisterTargetMachine<MipselTargetMachine> Y(getTheMipselTarget());
RegisterTargetMachine<MipsebTargetMachine> A(getTheMips64Target());
RegisterTargetMachine<MipselTargetMachine> B(getTheMips64elTarget());
+
+ PassRegistry *PR = PassRegistry::getPassRegistry();
+ initializeGlobalISel(*PR);
}
static std::string computeDataLayout(const Triple &TT, StringRef CPU,
@@ -230,6 +237,10 @@ public:
bool addInstSelector() override;
void addPreEmitPass() override;
void addPreRegAlloc() override;
+ bool addIRTranslator() override;
+ bool addLegalizeMachineIR() override;
+ bool addRegBankSelect() override;
+ bool addGlobalInstructionSelect() override;
};
} // end anonymous namespace
@@ -285,3 +296,23 @@ void MipsPassConfig::addPreEmitPass() {
addPass(createMipsHazardSchedule());
addPass(createMipsConstantIslandPass());
}
+
+bool MipsPassConfig::addIRTranslator() {
+ addPass(new IRTranslator());
+ return false;
+}
+
+bool MipsPassConfig::addLegalizeMachineIR() {
+ addPass(new Legalizer());
+ return false;
+}
+
+bool MipsPassConfig::addRegBankSelect() {
+ addPass(new RegBankSelect());
+ return false;
+}
+
+bool MipsPassConfig::addGlobalInstructionSelect() {
+ addPass(new InstructionSelect());
+ return false;
+}
Added: llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/ret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/ret.ll?rev=325888&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/ret.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/ret.ll Fri Feb 23 03:06:40 2018
@@ -0,0 +1,11 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
+
+
+define void @void() {
+ ; MIPS32-LABEL: name: void
+ ; MIPS32: bb.1.entry:
+ ; MIPS32: RetRA
+entry:
+ ret void
+}
Added: llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/ret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/ret.ll?rev=325888&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/ret.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/ret.ll Fri Feb 23 03:06:40 2018
@@ -0,0 +1,12 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
+
+define void @void() {
+; MIPS32-LABEL: void:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+entry:
+ ret void
+}
+
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