[PATCH] D43486: [mips] Spectre variant two mitigation for MIPSR2

[Simon Dardis via Phabricator via llvm-commits]

sdardis created this revision.
sdardis added reviewers: atanasyan, zoran.jovanovic.
Herald added subscribers: arichardson, dschuff.

This patch provides migitation for CVE-2017-5715, Spectre variant two,
which affects the https://reviews.llvm.org/P5600 and https://reviews.llvm.org/P6600. It implements the LLVM part of
-mindirect-jump=hazard. It is _not_ enabled by default for the https://reviews.llvm.org/P5600.

The migitation strategy suggested by MIPS for these processors is to use
hazard barrier instructions. 'jalr.hb' and 'jr.hb' are hazard
barrier variants of the 'jalr' and 'jr' instructions respectively.

These instructions impede the execution of instruction stream until
architecturally defined hazards (changes to the instruction stream,
privileged registers which may affect execution) are cleared. These
instructions in MIPS' designs are not speculated past.

These instructions are used with the option -mindirect-jump=hazard
when branching indirectly and for indirect function calls.

These instructions are defined by the MIPS32R2 ISA, so this mitigation
method is not compatible with processors which implement an earlier
revision of the MIPS ISA.

Performance benchmarking of this option with -fpic and lld using
-z hazardplt shows a difference of overall 10%~ time increase
for the LLVM testsuite. Certain benchmarks such as methcall show a
substantially larger increase in time due to their nature.


Repository:
  rL LLVM

https://reviews.llvm.org/D43486

Files:
  lib/Target/Mips/AsmParser/MipsAsmParser.cpp
  lib/Target/Mips/MicroMips32r6InstrInfo.td
  lib/Target/Mips/MicroMipsInstrInfo.td
  lib/Target/Mips/Mips.td
  lib/Target/Mips/Mips32r6InstrInfo.td
  lib/Target/Mips/Mips64InstrInfo.td
  lib/Target/Mips/Mips64r6InstrInfo.td
  lib/Target/Mips/MipsDSPInstrFormats.td
  lib/Target/Mips/MipsInstrFormats.td
  lib/Target/Mips/MipsInstrInfo.cpp
  lib/Target/Mips/MipsInstrInfo.td
  lib/Target/Mips/MipsLongBranch.cpp
  lib/Target/Mips/MipsSubtarget.cpp
  lib/Target/Mips/MipsSubtarget.h
  test/CodeGen/Mips/indirect-jump-hazard/calls.ll
  test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir
  test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir
  test/CodeGen/Mips/indirect-jump-hazard/jumptables.ll
  test/CodeGen/Mips/indirect-jump-hazard/long-branch.ll
  test/CodeGen/Mips/indirect-jump-hazard/long-calls.ll
  test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll
  test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll

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