[llvm] r325505 - Revert "[CodeGen] Move printing '\n' from MachineInstr::print to MachineBasicBlock::print"
Francis Visoiu Mistrih via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 19 07:08:50 PST 2018
Author: thegameg
Date: Mon Feb 19 07:08:49 2018
New Revision: 325505
URL: http://llvm.org/viewvc/llvm-project?rev=325505&view=rev
Log:
Revert "[CodeGen] Move printing '\n' from MachineInstr::print to MachineBasicBlock::print"
This reverts commit r324681.
Modified:
llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
llvm/trunk/lib/CodeGen/MachineInstr.cpp
llvm/trunk/lib/CodeGen/MachineScheduler.cpp
llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
llvm/trunk/lib/Target/AArch64/AArch64CollectLOH.cpp
Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=325505&r1=325504&r2=325505&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Mon Feb 19 07:08:49 2018
@@ -387,7 +387,6 @@ void MachineBasicBlock::print(raw_ostrea
if (!LI.LaneMask.all())
OS << ":0x" << PrintLaneMask(LI.LaneMask);
}
- OS << '\n';
HasLineAttributes = true;
}
Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=325505&r1=325504&r2=325505&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Feb 19 07:08:49 2018
@@ -1473,6 +1473,8 @@ void MachineInstr::print(raw_ostream &OS
if (isIndirectDebugValue())
OS << " indirect";
}
+
+ OS << '\n';
}
bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
Modified: llvm/trunk/lib/CodeGen/MachineScheduler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineScheduler.cpp?rev=325505&r1=325504&r2=325505&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineScheduler.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineScheduler.cpp Mon Feb 19 07:08:49 2018
@@ -549,13 +549,9 @@ void MachineSchedulerBase::scheduleRegio
}
DEBUG(dbgs() << "********** MI Scheduling **********\n");
DEBUG(dbgs() << MF->getName() << ":" << printMBBReference(*MBB) << " "
- << MBB->getName() << "\n From: " << *I << '\n'
- << " To: ";
- if (RegionEnd != MBB->end()) {
- dbgs() << *RegionEnd << '\n';
- } else {
- dbgs() << "End";
- }
+ << MBB->getName() << "\n From: " << *I << " To: ";
+ if (RegionEnd != MBB->end()) dbgs() << *RegionEnd;
+ else dbgs() << "End";
dbgs() << " RegionInstrs: " << NumRegionInstrs << '\n');
if (DumpCriticalPathLength) {
errs() << MF->getName();
@@ -1137,7 +1133,7 @@ void ScheduleDAGMILive::updatePressureDi
DEBUG(
dbgs() << " UpdateRegP: SU(" << SU.NodeNum << ") "
<< printReg(Reg, TRI) << ':' << PrintLaneMask(P.LaneMask)
- << ' ' << *SU.getInstr() << '\n';
+ << ' ' << *SU.getInstr();
dbgs() << " to ";
PDiff.dump(*TRI);
);
@@ -1174,7 +1170,7 @@ void ScheduleDAGMILive::updatePressureDi
PDiff.addPressureChange(Reg, true, &MRI);
DEBUG(
dbgs() << " UpdateRegP: SU(" << SU->NodeNum << ") "
- << *SU->getInstr() << '\n';
+ << *SU->getInstr();
dbgs() << " to ";
PDiff.dump(*TRI);
);
@@ -3338,8 +3334,7 @@ SUnit *PostGenericScheduler::pickNode(bo
IsTopNode = true;
Top.removeReady(SU);
- DEBUG(dbgs() << "Scheduling SU(" << SU->NodeNum << ") " << *SU->getInstr()
- << '\n');
+ DEBUG(dbgs() << "Scheduling SU(" << SU->NodeNum << ") " << *SU->getInstr());
return SU;
}
Modified: llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp?rev=325505&r1=325504&r2=325505&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp (original)
+++ llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp Mon Feb 19 07:08:49 2018
@@ -1099,7 +1099,6 @@ void ScheduleDAGInstrs::dumpNode(const S
// Cannot completely remove virtual function even in release mode.
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
SU->getInstr()->dump();
- dbgs() << '\n';
#endif
}
Modified: llvm/trunk/lib/Target/AArch64/AArch64CollectLOH.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64CollectLOH.cpp?rev=325505&r1=325504&r2=325505&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64CollectLOH.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64CollectLOH.cpp Mon Feb 19 07:08:49 2018
@@ -380,9 +380,8 @@ static bool handleMiddleInst(const Machi
static void handleADRP(const MachineInstr &MI, AArch64FunctionInfo &AFI,
LOHInfo &Info) {
if (Info.LastADRP != nullptr) {
- DEBUG(dbgs() << "Adding MCLOH_AdrpAdrp:\n"
- << '\t' << MI << '\n'
- << '\t' << *Info.LastADRP << '\n');
+ DEBUG(dbgs() << "Adding MCLOH_AdrpAdrp:\n" << '\t' << MI << '\t'
+ << *Info.LastADRP);
AFI.addLOHDirective(MCLOH_AdrpAdrp, {&MI, Info.LastADRP});
++NumADRPSimpleCandidate;
}
@@ -391,59 +390,48 @@ static void handleADRP(const MachineInst
if (Info.IsCandidate) {
switch (Info.Type) {
case MCLOH_AdrpAdd:
- DEBUG(dbgs() << "Adding MCLOH_AdrpAdd:\n"
- << '\t' << MI << '\n'
- << '\t' << *Info.MI0 << '\n');
+ DEBUG(dbgs() << "Adding MCLOH_AdrpAdd:\n" << '\t' << MI << '\t'
+ << *Info.MI0);
AFI.addLOHDirective(MCLOH_AdrpAdd, {&MI, Info.MI0});
++NumADRSimpleCandidate;
break;
case MCLOH_AdrpLdr:
if (supportLoadFromLiteral(*Info.MI0)) {
- DEBUG(dbgs() << "Adding MCLOH_AdrpLdr:\n"
- << '\t' << MI << '\n'
- << '\t' << *Info.MI0 << '\n');
+ DEBUG(dbgs() << "Adding MCLOH_AdrpLdr:\n" << '\t' << MI << '\t'
+ << *Info.MI0);
AFI.addLOHDirective(MCLOH_AdrpLdr, {&MI, Info.MI0});
++NumADRPToLDR;
}
break;
case MCLOH_AdrpAddLdr:
- DEBUG(dbgs() << "Adding MCLOH_AdrpAddLdr:\n"
- << '\t' << MI << '\n'
- << '\t' << *Info.MI1 << '\n'
- << '\t' << *Info.MI0 << '\n');
+ DEBUG(dbgs() << "Adding MCLOH_AdrpAddLdr:\n" << '\t' << MI << '\t'
+ << *Info.MI1 << '\t' << *Info.MI0);
AFI.addLOHDirective(MCLOH_AdrpAddLdr, {&MI, Info.MI1, Info.MI0});
++NumADDToLDR;
break;
case MCLOH_AdrpAddStr:
if (Info.MI1 != nullptr) {
- DEBUG(dbgs() << "Adding MCLOH_AdrpAddStr:\n"
- << '\t' << MI << '\n'
- << '\t' << *Info.MI1 << '\n'
- << '\t' << *Info.MI0 << '\n');
+ DEBUG(dbgs() << "Adding MCLOH_AdrpAddStr:\n" << '\t' << MI << '\t'
+ << *Info.MI1 << '\t' << *Info.MI0);
AFI.addLOHDirective(MCLOH_AdrpAddStr, {&MI, Info.MI1, Info.MI0});
++NumADDToSTR;
}
break;
case MCLOH_AdrpLdrGotLdr:
- DEBUG(dbgs() << "Adding MCLOH_AdrpLdrGotLdr:\n"
- << '\t' << MI << '\n'
- << '\t' << *Info.MI1 << '\n'
- << '\t' << *Info.MI0 << '\n');
+ DEBUG(dbgs() << "Adding MCLOH_AdrpLdrGotLdr:\n" << '\t' << MI << '\t'
+ << *Info.MI1 << '\t' << *Info.MI0);
AFI.addLOHDirective(MCLOH_AdrpLdrGotLdr, {&MI, Info.MI1, Info.MI0});
++NumLDRToLDR;
break;
case MCLOH_AdrpLdrGotStr:
- DEBUG(dbgs() << "Adding MCLOH_AdrpLdrGotStr:\n"
- << '\t' << MI << '\n'
- << '\t' << *Info.MI1 << '\n'
- << '\t' << *Info.MI0 << '\n');
+ DEBUG(dbgs() << "Adding MCLOH_AdrpLdrGotStr:\n" << '\t' << MI << '\t'
+ << *Info.MI1 << '\t' << *Info.MI0);
AFI.addLOHDirective(MCLOH_AdrpLdrGotStr, {&MI, Info.MI1, Info.MI0});
++NumLDRToSTR;
break;
case MCLOH_AdrpLdrGot:
- DEBUG(dbgs() << "Adding MCLOH_AdrpLdrGot:\n"
- << '\t' << MI << '\n'
- << '\t' << *Info.MI0 << '\n');
+ DEBUG(dbgs() << "Adding MCLOH_AdrpLdrGot:\n" << '\t' << MI << '\t'
+ << *Info.MI0);
AFI.addLOHDirective(MCLOH_AdrpLdrGot, {&MI, Info.MI0});
break;
case MCLOH_AdrpAdrp:
More information about the llvm-commits
mailing list