[PATCH] D38128: Handle COPYs of physregs better (regalloc hints)

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

In https://reviews.llvm.org/D38128#1011287, @jonpa wrote:

> In https://reviews.llvm.org/D38128#1010271, @rampitec wrote:
>
> > Changes look non-essential to me.
>
>
> Thank you, Stanislav. I committed this even though a last-minute change slipped in (diff from approved changes):
>
>   --- a/test/CodeGen/AMDGPU/ret.ll
>   +++ b/test/CodeGen/AMDGPU/ret.ll
>   @@ -178,8 +178,8 @@ bb:
>    }
>  
>    ; GCN-LABEL: {{^}}sgpr:
>   -; GCN-DAG: s_add_i32 s0, s3, 2
>   -; GCN-DAG: s_mov_b32 s2, s3
>   +; GCN: s_mov_b32 s2, s3
>   +; GCN: s_add_i32 s0, s2, 2
>    ; GCN-NOT: s_endpgm
>    define amdgpu_vs { i32, i32, i32 } @sgpr([9 x <16 x i8>] addrspace(4)* byval %arg, i32 inreg %arg1, i32 inreg %arg2, float %arg3) #0 {
>    bb:
>  
>
>
> This looks harmless to me - the add is using s2 instead of s3, directly after the move of s3 to s2, right? Please take a look.
>
> Committed as r325425.


This change in mov/add does not affect anything, thanks.


https://reviews.llvm.org/D38128