[PATCH] D43367: [X86] Turn selects with constant condition into vector shuffles during DAG combine

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

LGTM.



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Comment at: lib/Target/X86/X86ISelLowering.cpp:31553
+      Mask[i] = i;
+      if (CondElt.isUndef() || isNullConstant(CondElt))
+        Mask[i] += Size;
----------------
This could use a comment like:
Arbitrarily choose from the 2nd operand if the select condition element is undef. 
TODO: Can we do better by matching patterns such as even/odd?


https://reviews.llvm.org/D43367