[PATCH] D42962: [ARM] Allow 64- and 128-bit types with 't' inline asm constraint
Renato Golin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 15 06:14:20 PST 2018
rengolin accepted this revision.
rengolin added a comment.
This revision is now accepted and ready to land.
In https://reviews.llvm.org/D42962#1008514, @pbarrio wrote:
> Sorry, I don't understand. 32-bit integers are tested in a previous test (t-constraint-int) above the code added by the current patch, and 32-bit-integer vectors are tested in the tests I added in the last iteration (t-constraint-int-vector-128bit and t-constraint-int-vector-64bit). Is there any test I'm missing here?
Sorry, that was my own confusion. I read "floating point values" instead of "floating point registers". This looks good to me. Thanks!
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