[PATCH] D43243: X86 (16, 32): Fix for bug 27653 (swapped arguments in BOUND instruction)

Maya Madhavan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 13 09:15:51 PST 2018


maya.madhavan created this revision.
maya.madhavan added a reviewer: craig.topper.
Herald added a subscriber: llvm-commits.

The bound instruction does not have reversed operands.

"All intel opcodes have reversed operands except for "bound" and "enter". " - from GAS, tc-i386.c


Repository:
  rL LLVM

https://reviews.llvm.org/D43243

Files:
  lib/Target/X86/X86InstrInfo.td
  test/MC/X86/x86-16.s
  test/MC/X86/x86-32.s


Index: lib/Target/X86/X86InstrInfo.td
===================================================================
--- lib/Target/X86/X86InstrInfo.td
+++ lib/Target/X86/X86InstrInfo.td
@@ -2168,11 +2168,12 @@
 
 let SchedRW = [WriteSystem] in {
 // Check Array Index Against Bounds
+// Note: "bound" does not have reversed operands unlike most Intel instructions
 def BOUNDS16rm : I<0x62, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
-                   "bound\t{$src, $dst|$dst, $src}", [], IIC_BOUND>, OpSize16,
+                   "bound\t$dst, $src", [], IIC_BOUND>, OpSize16,
                    Requires<[Not64BitMode]>;
 def BOUNDS32rm : I<0x62, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
-                   "bound\t{$src, $dst|$dst, $src}", [], IIC_BOUND>, OpSize32,
+                   "bound\t$dst, $src", [], IIC_BOUND>, OpSize32,
                    Requires<[Not64BitMode]>;
 
 // Adjust RPL Field of Segment Selector
Index: test/MC/X86/x86-16.s
===================================================================
--- test/MC/X86/x86-16.s
+++ test/MC/X86/x86-16.s
@@ -637,13 +637,13 @@
 // CHECK:  encoding: [0x66,0xca,0xce,0x7a]
         	lretl	$0x7ace
 
-// CHECK: bound	2(%eax), %bx
+// CHECK: bound	%bx, 2(%eax)
 // CHECK:  encoding: [0x67,0x62,0x58,0x02]
-        	bound	2(%eax),%bx
+        	bound	%bx,2(%eax)
 
-// CHECK: bound	4(%ebx), %ecx
+// CHECK: bound	%ecx, 4(%ebx)
 // CHECK:  encoding: [0x67,0x66,0x62,0x4b,0x04]
-        	bound	4(%ebx),%ecx
+        	bound	%ecx,4(%ebx)
 
 // CHECK: arpl	%bx, %bx
 // CHECK:  encoding: [0x63,0xdb]
Index: test/MC/X86/x86-32.s
===================================================================
--- test/MC/X86/x86-32.s
+++ test/MC/X86/x86-32.s
@@ -770,13 +770,13 @@
 // CHECK:  encoding: [0x66,0xca,0xce,0x7a]
         	lretw	$0x7ace
 
-// CHECK: bound	2(%eax), %bx
+// CHECK: bound	%bx, 2(%eax)
 // CHECK:  encoding: [0x66,0x62,0x58,0x02]
-        	bound	2(%eax),%bx
+        	bound	%bx,2(%eax)
 
-// CHECK: bound	4(%ebx), %ecx
+// CHECK: bound	%ecx, 4(%ebx)
 // CHECK:  encoding: [0x62,0x4b,0x04]
-        	bound	4(%ebx),%ecx
+        	bound	%ecx,4(%ebx)
 
 // CHECK: arpl	%bx, %bx
 // CHECK:  encoding: [0x63,0xdb]


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