[llvm] r324987 - [X86] Add a test case showing blcic matching being broken by an and mask applied to the input. NFC

[Craig Topper via llvm-commits]

Author: ctopper
Date: Mon Feb 12 23:28:28 2018
New Revision: 324987

URL: http://llvm.org/viewvc/llvm-project?rev=324987&view=rev
Log:
[X86] Add a test case showing blcic matching being broken by an and mask applied to the input. NFC

Playing around with other BMI/TBM instructions after PR35792 and saw this.

Modified:
    llvm/trunk/test/CodeGen/X86/tbm_patterns.ll

Modified: llvm/trunk/test/CodeGen/X86/tbm_patterns.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm_patterns.ll?rev=324987&r1=324986&r2=324987&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm_patterns.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm_patterns.ll Mon Feb 12 23:28:28 2018
@@ -906,3 +906,22 @@ entry:
   %and = and i64 %x1, 4611686018427387903
   ret i64 %and
 }
+
+; This should select blcic
+; TODO: the xor is being combined with the mask and creating an or that's breaking this. Looks like a missing one use check.
+define  i64 @masked_blcic(i64) {
+; CHECK-LABEL: masked_blcic:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movzwl %di, %eax
+; CHECK-NEXT:    # kill: def $edi killed $edi killed $rdi def $rdi
+; CHECK-NEXT:    notl %edi
+; CHECK-NEXT:    orq $-65536, %rdi # imm = 0xFFFF0000
+; CHECK-NEXT:    incq %rax
+; CHECK-NEXT:    andq %rdi, %rax
+; CHECK-NEXT:    retq
+  %2 = and i64 %0, 65535
+  %3 = xor i64 %2, -1
+  %4 = add nuw nsw i64 %2, 1
+  %5 = and i64 %4, %3
+  ret i64 %5
+}