[PATCH] D42784: [ARM] Allow Half types in ConstantPool

Sjoerd Meijer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 12 08:00:35 PST 2018

SjoerdMeijer updated this revision to Diff 133865.
SjoerdMeijer added a comment.

It was indeed feeling when there e.g. was an existing 4-byte entry, which was
then followed by a 2-byte entry; the two new ARM and Thumb test cases
showed this. As suggested, we are now always emitting an alignment directive
(I've removed that if-statement).



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