[PATCH] D39115: [MIPS][MicroMIPS] Extending size reduction pass with LWP and SWP

[Simon Dardis via Phabricator via llvm-commits]

sdardis added inline comments.


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Comment at: lib/Target/Mips/MicroMipsSizeReduction.cpp:343
 
+// Returns true if MI can be reduced to lwp/swp instruciton
+static bool CheckXWPInstr(MachineInstr *MI, bool ReduceToLwp,
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instruciton -> instruction


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Comment at: lib/Target/Mips/MicroMipsSizeReduction.cpp:407
+                                   MachineBasicBlock::instr_iterator &NextMII,
+                                   const MachineBasicBlock::instr_iterator &E) {
 
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Rather than passing an explicit end iterator, determine the end from the instruction iterator MII, this reduces the number of arguments to be passed.


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Comment at: test/CodeGen/Mips/micromips-sizereduction/micromips-lwp-swp.ll:1
+; RUN: llc -march=mipsel -mattr=+micromips -mcpu=mips32r2 -verify-machineinstrs \
+; RUN:     < %s | FileCheck %s
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Change the -march=mipsel to -mtriple=mipsel-unknown-linux-gnu and  use update_llc_checks.py to generate the check lines.

Can you add another version of this test that is .mir based but with LW_MM and SW_MM, and mixes of LW & LW_MM, similarly for the stores?


https://reviews.llvm.org/D39115