[llvm] r324772 - [X86][MC] Fix assembling rip-relative addressing + immediate displacements

[Hans Wennborg via llvm-commits]

Merged to 6.0 in r324875.

On Fri, Feb 9, 2018 at 10:47 PM, Francis Visoiu Mistrih via
llvm-commits <llvm-commits at lists.llvm.org> wrote:
> Author: thegameg
> Date: Fri Feb  9 13:47:07 2018
> New Revision: 324772
>
> URL: http://llvm.org/viewvc/llvm-project?rev=324772&view=rev
> Log:
> [X86][MC] Fix assembling rip-relative addressing + immediate displacements
>
> In the rare case where the input contains rip-relative addressing with
> immediate displacements, *and* the instruction ends with an immediate,
> we encode the instruction in the wrong way:
>
> movl $12345678, 0x400(%rdi) // all good, no rip-relative addr
> movl %eax, 0x400(%rip) // all good, no immediate at the end of the instruction
> movl $12345678, 0x400(%rip) // fails, encodes address as 0x3fc(%rip)
>
> Offset is a label:
>
> movl $12345678, foo(%rip)
>
> we want to account for the size of the immediate (in this case,
> $12345678, 4 bytes).
>
> Offset is an immediate:
>
> movl $12345678, 0x400(%rip)
>
> we should not account for the size of the immediate, assuming the
> immediate offset is what the user wanted.
>
> Differential Revision: https://reviews.llvm.org/D43050
>
> Modified:
>     llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
>     llvm/trunk/test/MC/X86/x86-64.s
>
> Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp?rev=324772&r1=324771&r2=324772&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Fri Feb  9 13:47:07 2018
> @@ -396,10 +396,14 @@ void X86MCCodeEmitter::emitMemModRMByte(
>
>      // rip-relative addressing is actually relative to the *next* instruction.
>      // Since an immediate can follow the mod/rm byte for an instruction, this
> -    // means that we need to bias the immediate field of the instruction with
> -    // the size of the immediate field.  If we have this case, add it into the
> +    // means that we need to bias the displacement field of the instruction with
> +    // the size of the immediate field. If we have this case, add it into the
>      // expression to emit.
> -    int ImmSize = X86II::hasImm(TSFlags) ? X86II::getSizeOfImm(TSFlags) : 0;
> +    // Note: rip-relative addressing using immediate displacement values should
> +    // not be adjusted, assuming it was the user's intent.
> +    int ImmSize = !Disp.isImm() && X86II::hasImm(TSFlags)
> +                      ? X86II::getSizeOfImm(TSFlags)
> +                      : 0;
>
>      EmitImmediate(Disp, MI.getLoc(), 4, MCFixupKind(FixupKind),
>                    CurByte, OS, Fixups, -ImmSize);
>
> Modified: llvm/trunk/test/MC/X86/x86-64.s
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64.s?rev=324772&r1=324771&r2=324772&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/X86/x86-64.s (original)
> +++ llvm/trunk/test/MC/X86/x86-64.s Fri Feb  9 13:47:07 2018
> @@ -622,6 +622,11 @@ movl       $12, foo(%rip)
>  // CHECK: encoding: [0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
>  // CHECK:    fixup A - offset: 2, value: foo-8, kind: reloc_riprel_4byte
>
> +// rdar://37247000
> +movl   $12, 1024(%rip)
> +// CHECK: movl $12, 1024(%rip)
> +// CHECK: encoding: [0xc7,0x05,0x00,0x04,0x00,0x00,0x0c,0x00,0x00,0x00]
> +
>  movq   $12, foo(%rip)
>  // CHECK:  movq        $12, foo(%rip)
>  // CHECK: encoding: [0x48,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits