[PATCH] D43141: [DAG] make binops with undef operands consistent with IR

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: nlopes, majnemer, sanjoy, efriedma, kparzysz, RKSimon.
Herald added subscribers: javed.absar, mcrosier.

This started by noticing that scalar and vector types were producing different results with div ops in PR36305:
https://bugs.llvm.org/show_bug.cgi?id=36305

...but the problem is bigger. I couldn't keep it straight without a table, so I'm attaching that as a PDF to this review. The x86 tests in undef-ops.ll correspond to that table.

Green means that instsimplify and the DAG agree on the result for all types. 
Red means the DAG was returning undef when IR was not.
Yellow means the DAG was returning a non-undef result when IR returned undef.

This patch assumes that we're doing the right thing in IR, but now's a good time to confirm that. :)

Note: I couldn't find any problems with creating vector constants as the code comments were warning, but those comments were written long ago in https://reviews.llvm.org/rL36413 .

F5817645: undef in DAG.pdf <https://reviews.llvm.org/F5817645>


https://reviews.llvm.org/D43141

Files:
  lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  test/CodeGen/ARM/2013-07-29-vector-or-combine.ll
  test/CodeGen/Hexagon/tail-dup-subreg-map.ll
  test/CodeGen/X86/legalize-shl-vec.ll
  test/CodeGen/X86/machine-cp.ll
  test/CodeGen/X86/pr13577.ll
  test/CodeGen/X86/pr33960.ll
  test/CodeGen/X86/undef-ops.ll

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