[llvm] r324754 - [x86] remove duplicate undef tests; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 9 09:46:38 PST 2018
Author: spatel
Date: Fri Feb 9 09:46:38 2018
New Revision: 324754
URL: http://llvm.org/viewvc/llvm-project?rev=324754&view=rev
Log:
[x86] remove duplicate undef tests; NFC
These are incomplete and were made redundant with the consolidation in:
https://reviews.llvm.org/rL324678
Modified:
llvm/trunk/test/CodeGen/X86/combine-mul.ll
llvm/trunk/test/CodeGen/X86/combine-shl.ll
llvm/trunk/test/CodeGen/X86/combine-sra.ll
llvm/trunk/test/CodeGen/X86/combine-srl.ll
Modified: llvm/trunk/test/CodeGen/X86/combine-mul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-mul.ll?rev=324754&r1=324753&r2=324754&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-mul.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-mul.ll Fri Feb 9 09:46:38 2018
@@ -2,32 +2,6 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
-; fold (mul undef, x) -> 0
-define <4 x i32> @combine_vec_mul_undef0(<4 x i32> %x) {
-; SSE-LABEL: combine_vec_mul_undef0:
-; SSE: # %bb.0:
-; SSE-NEXT: retq
-;
-; AVX-LABEL: combine_vec_mul_undef0:
-; AVX: # %bb.0:
-; AVX-NEXT: retq
- %1 = mul <4 x i32> undef, %x
- ret <4 x i32> %1
-}
-
-; fold (mul x, undef) -> 0
-define <4 x i32> @combine_vec_mul_undef1(<4 x i32> %x) {
-; SSE-LABEL: combine_vec_mul_undef1:
-; SSE: # %bb.0:
-; SSE-NEXT: retq
-;
-; AVX-LABEL: combine_vec_mul_undef1:
-; AVX: # %bb.0:
-; AVX-NEXT: retq
- %1 = mul <4 x i32> %x, undef
- ret <4 x i32> %1
-}
-
; fold (mul x, 0) -> 0
define <4 x i32> @combine_vec_mul_zero(<4 x i32> %x) {
; SSE-LABEL: combine_vec_mul_zero:
Modified: llvm/trunk/test/CodeGen/X86/combine-shl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-shl.ll?rev=324754&r1=324753&r2=324754&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-shl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-shl.ll Fri Feb 9 09:46:38 2018
@@ -3,24 +3,6 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX-SLOW
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=CHECK,AVX,AVX-FAST
-; fold (shl undef, x) -> 0
-define i32 @combine_shl_undef0(i32 %x) {
-; CHECK-LABEL: combine_shl_undef0:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: retq
- %1 = shl i32 undef, %x
- ret i32 %1
-}
-
-define <4 x i32> @combine_vec_shl_undef0(<4 x i32> %x) {
-; CHECK-LABEL: combine_vec_shl_undef0:
-; CHECK: # %bb.0:
-; CHECK-NEXT: retq
- %1 = shl <4 x i32> undef, %x
- ret <4 x i32> %1
-}
-
; fold (shl 0, x) -> 0
define <4 x i32> @combine_vec_shl_zero(<4 x i32> %x) {
; SSE-LABEL: combine_vec_shl_zero:
Modified: llvm/trunk/test/CodeGen/X86/combine-sra.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-sra.ll?rev=324754&r1=324753&r2=324754&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-sra.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-sra.ll Fri Feb 9 09:46:38 2018
@@ -3,23 +3,6 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2-SLOW
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=CHECK,AVX,AVX2-FAST
-; fold (sra undef, x) -> undef
-define i32 @combine_lshr_undef0(i32 %x) {
-; CHECK-LABEL: combine_lshr_undef0:
-; CHECK: # %bb.0:
-; CHECK-NEXT: retq
- %1 = ashr i32 undef, %x
- ret i32 %1
-}
-
-define <4 x i32> @combine_vec_ashr_undef0(<4 x i32> %x) {
-; CHECK-LABEL: combine_vec_ashr_undef0:
-; CHECK: # %bb.0:
-; CHECK-NEXT: retq
- %1 = ashr <4 x i32> undef, %x
- ret <4 x i32> %1
-}
-
; fold (sra 0, x) -> 0
define <4 x i32> @combine_vec_ashr_zero(<4 x i32> %x) {
; SSE-LABEL: combine_vec_ashr_zero:
Modified: llvm/trunk/test/CodeGen/X86/combine-srl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-srl.ll?rev=324754&r1=324753&r2=324754&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-srl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-srl.ll Fri Feb 9 09:46:38 2018
@@ -3,24 +3,6 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2-SLOW
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=CHECK,AVX,AVX2-FAST
-; fold (srl undef, x) -> 0
-define i32 @combine_lshr_undef0(i32 %x) {
-; CHECK-LABEL: combine_lshr_undef0:
-; CHECK: # %bb.0:
-; CHECK-NEXT: xorl %eax, %eax
-; CHECK-NEXT: retq
- %1 = lshr i32 undef, %x
- ret i32 %1
-}
-
-define <4 x i32> @combine_vec_lshr_undef0(<4 x i32> %x) {
-; CHECK-LABEL: combine_vec_lshr_undef0:
-; CHECK: # %bb.0:
-; CHECK-NEXT: retq
- %1 = lshr <4 x i32> undef, %x
- ret <4 x i32> %1
-}
-
; fold (srl 0, x) -> 0
define <4 x i32> @combine_vec_lshr_zero(<4 x i32> %x) {
; SSE-LABEL: combine_vec_lshr_zero:
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