[llvm] r324664 - [GlobalIsel][X86] Making {G_IMPLICIT_DEF, s128} legal

[Alexander Ivchenko via llvm-commits]

Author: aivchenk
Date: Thu Feb  8 14:40:31 2018
New Revision: 324664

URL: http://llvm.org/viewvc/llvm-project?rev=324664&view=rev
Log:
[GlobalIsel][X86] Making {G_IMPLICIT_DEF, s128} legal

The patch is a split from D42287 and is related to
fixing failures after https://reviews.llvm.org/D37775

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D42287


Modified:
    llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp
    llvm/trunk/test/CodeGen/X86/GlobalISel/select-undef.mir

Modified: llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp?rev=324664&r1=324663&r2=324664&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86LegalizerInfo.cpp Thu Feb  8 14:40:31 2018
@@ -163,6 +163,9 @@ void X86LegalizerInfo::setLegalizerInfo6
   const LLT s128 = LLT::scalar(128);
 
   setAction({G_IMPLICIT_DEF, s64}, Legal);
+  // Need to have that, as tryFoldImplicitDef will create this pattern:
+  // s128 = EXTEND (G_IMPLICIT_DEF s32/s64) -> s128 = G_IMPLICIT_DEF
+  setAction({G_IMPLICIT_DEF, s128}, Legal);
 
   setAction({G_PHI, s64}, Legal);
 

Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/select-undef.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/select-undef.mir?rev=324664&r1=324663&r2=324664&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/select-undef.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/select-undef.mir Thu Feb  8 14:40:31 2018
@@ -11,6 +11,9 @@
     ret i8 %r
   }
 
+  define float @test3() {
+    ret float undef
+  }
 ...
 ---
 name:            test
@@ -64,3 +67,22 @@ body:             |
     RET 0, implicit $al
 
 ...
+---
+name:            test3
+alignment:       4
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vecr }
+body:             |
+  bb.1 (%ir-block.0):
+    ; ALL-LABEL: name: test3
+    ; ALL: [[DEF:%[0-9]+]]:vr128 = IMPLICIT_DEF
+    ; ALL: $xmm0 = COPY [[DEF]]
+    ; ALL: RET 0, implicit $xmm0
+    %1:vecr(s128) = G_IMPLICIT_DEF
+    $xmm0 = COPY %1:vecr(s128)
+    RET 0, implicit $xmm0
+
+...