[PATCH] D42723: [AArch64] Refactor instructions using SIMD immediates

Sjoerd Meijer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 7 12:58:57 PST 2018


SjoerdMeijer added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll:540
 ; CHECK:  bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
-	%tmp1 = and <1 x i64> %a, < i64 -16 >
-	%tmp2 = and <1 x i64> %b, < i64 15 >
+	%tmp1 = and <1 x i64> %a, < i64 -256 >
+	%tmp2 = and <1 x i64> %b, < i64 255 >
----------------
drive-by comment: why are you changing the test?

The clean up looks very reasonable to me, but it's a big patch,
so I need some more time to digest the rest.


Repository:
  rL LLVM

https://reviews.llvm.org/D42723





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