[PATCH] D43020: [AArch64] Don't materialize 0 with "fmov h0, .." when FullFP16 is not supported.

Evandro Menezes via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 7 08:40:36 PST 2018


evandro added a comment.

Other than the comments below, I second @olista01, LGTM.



================
Comment at: test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll:6
 ; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=falkor    < %s | FileCheck %s -check-prefixes=ALL,OTHERS
 
 ; rdar://11481771
----------------
Perhaps adding a test with just `-mattr=fullfp16` is in order.


================
Comment at: test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll:19
 ; ALL-NOT: fmov
-; CYCLONE: fmov h0, wzr
+; CYCLONE: ldr h0,{{.*}}
 ; CYCLONE: fmov s1, wzr
----------------
Since this line is identical to #23, it could be prefixed with `ALL` and #23 deleted.


https://reviews.llvm.org/D43020





More information about the llvm-commits mailing list