[PATCH] D42295: [AArch64][SVE] Asm: Add AND_ZI instructions and aliases

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


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Comment at: lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp:1666
+  DecodeZPRRegisterClass(Inst, Zdn, Addr, Decoder);
+  DecodeZPRRegisterClass(Inst, Zdn, Addr, Decoder);
+  Inst.addOperand(MCOperand::createImm(imm));
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fhahn wrote:
> Is this exactly the same as above?
The same (tied) operand is added twice to the instruction, see line 470.


https://reviews.llvm.org/D42295