[lld] r324064 - [ELF][MIPS] Change format of output relocations to Elf_Rel
Simon Atanasyan via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 2 01:50:07 PST 2018
Author: atanasyan
Date: Fri Feb 2 01:50:07 2018
New Revision: 324064
URL: http://llvm.org/viewvc/llvm-project?rev=324064&view=rev
Log:
[ELF][MIPS] Change format of output relocations to Elf_Rel
Initially LLD generates Elf_Rel relocations for O32 ABI and Elf_Rela
relocations for N32 / N64 ABIs. In other words, format of input and
output relocations was always the same. Now LLD generates all output
relocations using Elf_Rel format only. It conforms to ABIs requirement.
The patch suggested by Alexander Richardson.
Modified:
lld/trunk/ELF/Driver.cpp
lld/trunk/ELF/InputSection.cpp
lld/trunk/test/ELF/mips-64.s
lld/trunk/test/ELF/mips-tls-64.s
lld/trunk/test/ELF/mips64-eh-abs-reloc.s
Modified: lld/trunk/ELF/Driver.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Driver.cpp?rev=324064&r1=324063&r2=324064&view=diff
==============================================================================
--- lld/trunk/ELF/Driver.cpp (original)
+++ lld/trunk/ELF/Driver.cpp Fri Feb 2 01:50:07 2018
@@ -813,7 +813,7 @@ static void setConfigs() {
Config->IsLE ? support::endianness::little : support::endianness::big;
Config->IsMips64EL = (Kind == ELF64LEKind && Machine == EM_MIPS);
Config->IsRela =
- Config->Is64 || IsX32 || Config->MipsN32Abi || Machine == EM_PPC;
+ (Config->Is64 || IsX32 || Machine == EM_PPC) && Machine != EM_MIPS;
Config->Pic = Config->Pie || Config->Shared;
Config->Wordsize = Config->Is64 ? 8 : 4;
}
Modified: lld/trunk/ELF/InputSection.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/InputSection.cpp?rev=324064&r1=324063&r2=324064&view=diff
==============================================================================
--- lld/trunk/ELF/InputSection.cpp (original)
+++ lld/trunk/ELF/InputSection.cpp Fri Feb 2 01:50:07 2018
@@ -339,7 +339,7 @@ void InputSection::copyRelocations(uint8
auto *P = reinterpret_cast<typename ELFT::Rela *>(Buf);
Buf += sizeof(RelTy);
- if (Config->IsRela)
+ if (RelTy::IsRela)
P->r_addend = getAddend<ELFT>(Rel);
// Output section VA is zero for -r, so r_offset is an offset within the
@@ -369,7 +369,7 @@ void InputSection::copyRelocations(uint8
continue;
}
- if (Config->IsRela) {
+ if (RelTy::IsRela) {
P->r_addend =
Sym.getVA(getAddend<ELFT>(Rel)) - Section->getOutputSection()->Addr;
} else if (Config->Relocatable) {
Modified: lld/trunk/test/ELF/mips-64.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/mips-64.s?rev=324064&r1=324063&r2=324064&view=diff
==============================================================================
--- lld/trunk/test/ELF/mips-64.s (original)
+++ lld/trunk/test/ELF/mips-64.s Fri Feb 2 01:50:07 2018
@@ -30,17 +30,16 @@ v2:
# SYM: 00020008 g .data 00000008 v2
# CHECK: Relocations [
-# CHECK-NEXT: Section (7) .rela.dyn {
-# CHECK-NEXT: 0x20010 R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE - 0x20000
-# ^-- v1
-# CHECK-NEXT: 0x20008 R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE v2 0x8
+# CHECK-NEXT: Section (7) .rel.dyn {
+# CHECK-NEXT: 0x20010 R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE - 0x0
+# CHECK-NEXT: 0x20008 R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE v2 0x0
# CHECK-NEXT: }
# CHECK-NEXT: ]
# CHECK: DynamicSection [
# CHECK: Tag Type Name/Value
-# CHECK: 0x0000000000000008 RELASZ 48 (bytes)
-# CHECK: 0x0000000000000009 RELAENT 24 (bytes)
+# CHECK: 0x0000000000000012 RELSZ 32 (bytes)
+# CHECK: 0x0000000000000013 RELENT 16 (bytes)
# CHECK: Primary GOT {
# CHECK-NEXT: Canonical gp value:
Modified: lld/trunk/test/ELF/mips-tls-64.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/mips-tls-64.s?rev=324064&r1=324063&r2=324064&view=diff
==============================================================================
--- lld/trunk/test/ELF/mips-tls-64.s (original)
+++ lld/trunk/test/ELF/mips-tls-64.s Fri Feb 2 01:50:07 2018
@@ -34,7 +34,7 @@
# DIS: 0000000000000000 g *UND* 00000000 foo
# CHECK: Relocations [
-# CHECK-NEXT: Section (7) .rela.dyn {
+# CHECK-NEXT: Section (7) .rel.dyn {
# CHECK-NEXT: 0x30020 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE foo 0x0
# CHECK-NEXT: 0x30028 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0
# CHECK-NEXT: 0x30030 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0
@@ -66,7 +66,7 @@
# DIS-SO-NEXT: 20040 00000000 00000000 00000000 00000000
# SO: Relocations [
-# SO-NEXT: Section (7) .rela.dyn {
+# SO-NEXT: Section (7) .rel.dyn {
# SO-NEXT: 0x20028 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE - 0x0
# SO-NEXT: 0x20038 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE bar 0x0
# SO-NEXT: 0x20040 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE bar 0x0
Modified: lld/trunk/test/ELF/mips64-eh-abs-reloc.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/mips64-eh-abs-reloc.s?rev=324064&r1=324063&r2=324064&view=diff
==============================================================================
--- lld/trunk/test/ELF/mips64-eh-abs-reloc.s (original)
+++ lld/trunk/test/ELF/mips64-eh-abs-reloc.s Fri Feb 2 01:50:07 2018
@@ -20,8 +20,8 @@
# OBJ-NEXT: }
# PIC-RELOCS: Relocations [
-# PIC-RELOCS-NEXT: Section (7) .rela.dyn {
-# PIC-RELOCS-NEXT: {{0x.+}} R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE - 0x10000
+# PIC-RELOCS-NEXT: Section (7) .rel.dyn {
+# PIC-RELOCS-NEXT: {{0x.+}} R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE - 0x0
# PIC-RELOCS-NEXT: }
# PIC-RELOCS-NEXT:]
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