[llvm] r324015 - [X86][XOP] Add XOP to variable permute tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 1 13:57:37 PST 2018
Author: rksimon
Date: Thu Feb 1 13:57:37 2018
New Revision: 324015
URL: http://llvm.org/viewvc/llvm-project?rev=324015&view=rev
Log:
[X86][XOP] Add XOP to variable permute tests
Modified:
llvm/trunk/test/CodeGen/X86/var-permute-128.ll
llvm/trunk/test/CodeGen/X86/var-permute-256.ll
Modified: llvm/trunk/test/CodeGen/X86/var-permute-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/var-permute-128.ll?rev=324015&r1=324014&r2=324015&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/var-permute-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/var-permute-128.ll Thu Feb 1 13:57:37 2018
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSSE3
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,XOP
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVXNOVLBW,AVX512F
Modified: llvm/trunk/test/CodeGen/X86/var-permute-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/var-permute-256.ll?rev=324015&r1=324014&r2=324015&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/var-permute-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/var-permute-256.ll Thu Feb 1 13:57:37 2018
@@ -1,4 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,XOP
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,INT256,AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,INT256,AVX512,AVX512F
@@ -9,6 +10,33 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+avx512vbmi | FileCheck %s --check-prefixes=AVX,INT256,AVX512,AVX512VLBW,VBMI
define <4 x i64> @var_shuffle_v4i64(<4 x i64> %v, <4 x i64> %indices) nounwind {
+; XOP-LABEL: var_shuffle_v4i64:
+; XOP: # %bb.0:
+; XOP-NEXT: pushq %rbp
+; XOP-NEXT: movq %rsp, %rbp
+; XOP-NEXT: andq $-32, %rsp
+; XOP-NEXT: subq $64, %rsp
+; XOP-NEXT: vmovq %xmm1, %rax
+; XOP-NEXT: andl $3, %eax
+; XOP-NEXT: vpextrq $1, %xmm1, %rcx
+; XOP-NEXT: andl $3, %ecx
+; XOP-NEXT: vextractf128 $1, %ymm1, %xmm1
+; XOP-NEXT: vmovq %xmm1, %rdx
+; XOP-NEXT: andl $3, %edx
+; XOP-NEXT: vpextrq $1, %xmm1, %rsi
+; XOP-NEXT: andl $3, %esi
+; XOP-NEXT: vmovaps %ymm0, (%rsp)
+; XOP-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+; XOP-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+; XOP-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; XOP-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+; XOP-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero
+; XOP-NEXT: vmovlhps {{.*#+}} xmm1 = xmm2[0],xmm1[0]
+; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; XOP-NEXT: movq %rbp, %rsp
+; XOP-NEXT: popq %rbp
+; XOP-NEXT: retq
+;
; AVX1-LABEL: var_shuffle_v4i64:
; AVX1: # %bb.0:
; AVX1-NEXT: pushq %rbp
@@ -103,6 +131,43 @@ define <4 x i64> @var_shuffle_v4i64(<4 x
}
define <8 x i32> @var_shuffle_v8i32(<8 x i32> %v, <8 x i32> %indices) nounwind {
+; XOP-LABEL: var_shuffle_v8i32:
+; XOP: # %bb.0:
+; XOP-NEXT: pushq %rbp
+; XOP-NEXT: movq %rsp, %rbp
+; XOP-NEXT: andq $-32, %rsp
+; XOP-NEXT: subq $64, %rsp
+; XOP-NEXT: vmovd %xmm1, %r8d
+; XOP-NEXT: vpextrd $1, %xmm1, %r9d
+; XOP-NEXT: vpextrd $2, %xmm1, %r10d
+; XOP-NEXT: vpextrd $3, %xmm1, %esi
+; XOP-NEXT: vextractf128 $1, %ymm1, %xmm1
+; XOP-NEXT: vmovd %xmm1, %edi
+; XOP-NEXT: vpextrd $1, %xmm1, %eax
+; XOP-NEXT: vpextrd $2, %xmm1, %ecx
+; XOP-NEXT: vpextrd $3, %xmm1, %edx
+; XOP-NEXT: vmovaps %ymm0, (%rsp)
+; XOP-NEXT: andl $7, %r8d
+; XOP-NEXT: andl $7, %r9d
+; XOP-NEXT: andl $7, %r10d
+; XOP-NEXT: andl $7, %esi
+; XOP-NEXT: andl $7, %edi
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: andl $7, %ecx
+; XOP-NEXT: andl $7, %edx
+; XOP-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; XOP-NEXT: vpinsrd $1, (%rsp,%rax,4), %xmm0, %xmm0
+; XOP-NEXT: vpinsrd $2, (%rsp,%rcx,4), %xmm0, %xmm0
+; XOP-NEXT: vpinsrd $3, (%rsp,%rdx,4), %xmm0, %xmm0
+; XOP-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; XOP-NEXT: vpinsrd $1, (%rsp,%r9,4), %xmm1, %xmm1
+; XOP-NEXT: vpinsrd $2, (%rsp,%r10,4), %xmm1, %xmm1
+; XOP-NEXT: vpinsrd $3, (%rsp,%rsi,4), %xmm1, %xmm1
+; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; XOP-NEXT: movq %rbp, %rsp
+; XOP-NEXT: popq %rbp
+; XOP-NEXT: retq
+;
; AVX1-LABEL: var_shuffle_v8i32:
; AVX1: # %bb.0:
; AVX1-NEXT: pushq %rbp
@@ -172,6 +237,69 @@ define <8 x i32> @var_shuffle_v8i32(<8 x
}
define <16 x i16> @var_shuffle_v16i16(<16 x i16> %v, <16 x i16> %indices) nounwind {
+; XOP-LABEL: var_shuffle_v16i16:
+; XOP: # %bb.0:
+; XOP-NEXT: pushq %rbp
+; XOP-NEXT: movq %rsp, %rbp
+; XOP-NEXT: andq $-32, %rsp
+; XOP-NEXT: subq $64, %rsp
+; XOP-NEXT: vextractf128 $1, %ymm1, %xmm2
+; XOP-NEXT: vmovd %xmm2, %eax
+; XOP-NEXT: vmovaps %ymm0, (%rsp)
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzwl (%rsp,%rax,2), %eax
+; XOP-NEXT: vmovd %eax, %xmm0
+; XOP-NEXT: vpextrw $1, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $1, (%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vpextrw $2, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $2, (%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vpextrw $3, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $3, (%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vpextrw $4, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $4, (%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vpextrw $5, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $5, (%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vpextrw $6, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $6, (%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vpextrw $7, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $7, (%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vmovd %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzwl (%rsp,%rax,2), %eax
+; XOP-NEXT: vmovd %eax, %xmm2
+; XOP-NEXT: vpextrw $1, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $1, (%rsp,%rax,2), %xmm2, %xmm2
+; XOP-NEXT: vpextrw $2, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $2, (%rsp,%rax,2), %xmm2, %xmm2
+; XOP-NEXT: vpextrw $3, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $3, (%rsp,%rax,2), %xmm2, %xmm2
+; XOP-NEXT: vpextrw $4, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $4, (%rsp,%rax,2), %xmm2, %xmm2
+; XOP-NEXT: vpextrw $5, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $5, (%rsp,%rax,2), %xmm2, %xmm2
+; XOP-NEXT: vpextrw $6, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $6, (%rsp,%rax,2), %xmm2, %xmm2
+; XOP-NEXT: vpextrw $7, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrw $7, (%rsp,%rax,2), %xmm2, %xmm1
+; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; XOP-NEXT: movq %rbp, %rsp
+; XOP-NEXT: popq %rbp
+; XOP-NEXT: retq
+;
; AVX1-LABEL: var_shuffle_v16i16:
; AVX1: # %bb.0:
; AVX1-NEXT: pushq %rbp
@@ -543,6 +671,133 @@ define <16 x i16> @var_shuffle_v16i16(<1
}
define <32 x i8> @var_shuffle_v32i8(<32 x i8> %v, <32 x i8> %indices) nounwind {
+; XOP-LABEL: var_shuffle_v32i8:
+; XOP: # %bb.0:
+; XOP-NEXT: pushq %rbp
+; XOP-NEXT: movq %rsp, %rbp
+; XOP-NEXT: andq $-32, %rsp
+; XOP-NEXT: subq $64, %rsp
+; XOP-NEXT: vextractf128 $1, %ymm1, %xmm2
+; XOP-NEXT: vpextrb $0, %xmm2, %eax
+; XOP-NEXT: vmovaps %ymm0, (%rsp)
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vmovd %eax, %xmm0
+; XOP-NEXT: vpextrb $1, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $1, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $2, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $3, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $4, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $5, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $6, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $7, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $8, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $9, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $10, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $10, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $11, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $12, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $12, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $13, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $14, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $15, %xmm2, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $0, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vmovd %eax, %xmm2
+; XOP-NEXT: vpextrb $1, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $1, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $2, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $2, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $3, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $3, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $4, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $4, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $5, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $5, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $6, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $6, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $7, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $7, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $8, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $8, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $9, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $9, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $10, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $10, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $11, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $11, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $12, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $12, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $13, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $13, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $14, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: vpinsrb $14, (%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $15, %xmm1, %eax
+; XOP-NEXT: andl $31, %eax
+; XOP-NEXT: movzbl (%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
+; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; XOP-NEXT: movq %rbp, %rsp
+; XOP-NEXT: popq %rbp
+; XOP-NEXT: retq
+;
; AVX1-LABEL: var_shuffle_v32i8:
; AVX1: # %bb.0:
; AVX1-NEXT: pushq %rbp
@@ -1282,6 +1537,31 @@ define <32 x i8> @var_shuffle_v32i8(<32
}
define <4 x double> @var_shuffle_v4f64(<4 x double> %v, <4 x i64> %indices) nounwind {
+; XOP-LABEL: var_shuffle_v4f64:
+; XOP: # %bb.0:
+; XOP-NEXT: pushq %rbp
+; XOP-NEXT: movq %rsp, %rbp
+; XOP-NEXT: andq $-32, %rsp
+; XOP-NEXT: subq $64, %rsp
+; XOP-NEXT: vmovq %xmm1, %rax
+; XOP-NEXT: andl $3, %eax
+; XOP-NEXT: vpextrq $1, %xmm1, %rcx
+; XOP-NEXT: andl $3, %ecx
+; XOP-NEXT: vextractf128 $1, %ymm1, %xmm1
+; XOP-NEXT: vmovq %xmm1, %rdx
+; XOP-NEXT: andl $3, %edx
+; XOP-NEXT: vpextrq $1, %xmm1, %rsi
+; XOP-NEXT: andl $3, %esi
+; XOP-NEXT: vmovaps %ymm0, (%rsp)
+; XOP-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+; XOP-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
+; XOP-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+; XOP-NEXT: vmovhpd {{.*#+}} xmm1 = xmm1[0],mem[0]
+; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; XOP-NEXT: movq %rbp, %rsp
+; XOP-NEXT: popq %rbp
+; XOP-NEXT: retq
+;
; AVX1-LABEL: var_shuffle_v4f64:
; AVX1: # %bb.0:
; AVX1-NEXT: pushq %rbp
@@ -1374,6 +1654,43 @@ define <4 x double> @var_shuffle_v4f64(<
}
define <8 x float> @var_shuffle_v8f32(<8 x float> %v, <8 x i32> %indices) nounwind {
+; XOP-LABEL: var_shuffle_v8f32:
+; XOP: # %bb.0:
+; XOP-NEXT: pushq %rbp
+; XOP-NEXT: movq %rsp, %rbp
+; XOP-NEXT: andq $-32, %rsp
+; XOP-NEXT: subq $64, %rsp
+; XOP-NEXT: vmovd %xmm1, %esi
+; XOP-NEXT: vpextrd $1, %xmm1, %r8d
+; XOP-NEXT: vpextrd $2, %xmm1, %r9d
+; XOP-NEXT: vpextrd $3, %xmm1, %r10d
+; XOP-NEXT: vextractf128 $1, %ymm1, %xmm1
+; XOP-NEXT: vmovd %xmm1, %edx
+; XOP-NEXT: vpextrd $1, %xmm1, %edi
+; XOP-NEXT: vpextrd $2, %xmm1, %eax
+; XOP-NEXT: vpextrd $3, %xmm1, %ecx
+; XOP-NEXT: vmovaps %ymm0, (%rsp)
+; XOP-NEXT: andl $7, %esi
+; XOP-NEXT: andl $7, %r8d
+; XOP-NEXT: andl $7, %r9d
+; XOP-NEXT: andl $7, %r10d
+; XOP-NEXT: andl $7, %edx
+; XOP-NEXT: andl $7, %edi
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: andl $7, %ecx
+; XOP-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; XOP-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
+; XOP-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
+; XOP-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+; XOP-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; XOP-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[2,3]
+; XOP-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],mem[0],xmm1[3]
+; XOP-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],mem[0]
+; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; XOP-NEXT: movq %rbp, %rsp
+; XOP-NEXT: popq %rbp
+; XOP-NEXT: retq
+;
; AVX1-LABEL: var_shuffle_v8f32:
; AVX1: # %bb.0:
; AVX1-NEXT: pushq %rbp
@@ -1447,6 +1764,27 @@ define <8 x float> @var_shuffle_v8f32(<8
;
define <4 x i64> @var_shuffle_v4i64_from_v2i64(<2 x i64> %v, <4 x i64> %indices) nounwind {
+; XOP-LABEL: var_shuffle_v4i64_from_v2i64:
+; XOP: # %bb.0:
+; XOP-NEXT: vmovq %xmm1, %rax
+; XOP-NEXT: andl $1, %eax
+; XOP-NEXT: vpextrq $1, %xmm1, %rcx
+; XOP-NEXT: andl $1, %ecx
+; XOP-NEXT: vextractf128 $1, %ymm1, %xmm1
+; XOP-NEXT: vmovq %xmm1, %rdx
+; XOP-NEXT: andl $1, %edx
+; XOP-NEXT: vpextrq $1, %xmm1, %rsi
+; XOP-NEXT: andl $1, %esi
+; XOP-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+; XOP-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+; XOP-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+; XOP-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; XOP-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+; XOP-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero
+; XOP-NEXT: vmovlhps {{.*#+}} xmm1 = xmm2[0],xmm1[0]
+; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; XOP-NEXT: retq
+;
; AVX1-LABEL: var_shuffle_v4i64_from_v2i64:
; AVX1: # %bb.0:
; AVX1-NEXT: vmovq %xmm1, %rax
@@ -1540,6 +1878,37 @@ define <4 x i64> @var_shuffle_v4i64_from
}
define <8 x i32> @var_shuffle_v8i32_from_v4i32(<4 x i32> %v, <8 x i32> %indices) unnamed_addr nounwind {
+; XOP-LABEL: var_shuffle_v8i32_from_v4i32:
+; XOP: # %bb.0: # %entry
+; XOP-NEXT: vmovd %xmm1, %r8d
+; XOP-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+; XOP-NEXT: andl $3, %r8d
+; XOP-NEXT: vpextrd $1, %xmm1, %r9d
+; XOP-NEXT: andl $3, %r9d
+; XOP-NEXT: vpextrd $2, %xmm1, %r10d
+; XOP-NEXT: andl $3, %r10d
+; XOP-NEXT: vpextrd $3, %xmm1, %esi
+; XOP-NEXT: andl $3, %esi
+; XOP-NEXT: vextractf128 $1, %ymm1, %xmm0
+; XOP-NEXT: vmovd %xmm0, %edi
+; XOP-NEXT: andl $3, %edi
+; XOP-NEXT: vpextrd $1, %xmm0, %eax
+; XOP-NEXT: andl $3, %eax
+; XOP-NEXT: vpextrd $2, %xmm0, %ecx
+; XOP-NEXT: andl $3, %ecx
+; XOP-NEXT: vpextrd $3, %xmm0, %edx
+; XOP-NEXT: andl $3, %edx
+; XOP-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; XOP-NEXT: vpinsrd $1, -24(%rsp,%rax,4), %xmm0, %xmm0
+; XOP-NEXT: vpinsrd $2, -24(%rsp,%rcx,4), %xmm0, %xmm0
+; XOP-NEXT: vpinsrd $3, -24(%rsp,%rdx,4), %xmm0, %xmm0
+; XOP-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; XOP-NEXT: vpinsrd $1, -24(%rsp,%r9,4), %xmm1, %xmm1
+; XOP-NEXT: vpinsrd $2, -24(%rsp,%r10,4), %xmm1, %xmm1
+; XOP-NEXT: vpinsrd $3, -24(%rsp,%rsi,4), %xmm1, %xmm1
+; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; XOP-NEXT: retq
+;
; AVX1-LABEL: var_shuffle_v8i32_from_v4i32:
; AVX1: # %bb.0: # %entry
; AVX1-NEXT: vmovd %xmm1, %r8d
@@ -1605,6 +1974,63 @@ entry:
}
define <16 x i16> @var_shuffle_v16i16_from_v8i16(<8 x i16> %v, <16 x i16> %indices) nounwind {
+; XOP-LABEL: var_shuffle_v16i16_from_v8i16:
+; XOP: # %bb.0:
+; XOP-NEXT: vextractf128 $1, %ymm1, %xmm2
+; XOP-NEXT: vmovd %xmm2, %eax
+; XOP-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: movzwl -24(%rsp,%rax,2), %eax
+; XOP-NEXT: vmovd %eax, %xmm0
+; XOP-NEXT: vpextrw $1, %xmm2, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $1, -24(%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vpextrw $2, %xmm2, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $2, -24(%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vpextrw $3, %xmm2, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $3, -24(%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vpextrw $4, %xmm2, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $4, -24(%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vpextrw $5, %xmm2, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $5, -24(%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vpextrw $6, %xmm2, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $6, -24(%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vpextrw $7, %xmm2, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $7, -24(%rsp,%rax,2), %xmm0, %xmm0
+; XOP-NEXT: vmovd %xmm1, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: movzwl -24(%rsp,%rax,2), %eax
+; XOP-NEXT: vmovd %eax, %xmm2
+; XOP-NEXT: vpextrw $1, %xmm1, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $1, -24(%rsp,%rax,2), %xmm2, %xmm2
+; XOP-NEXT: vpextrw $2, %xmm1, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $2, -24(%rsp,%rax,2), %xmm2, %xmm2
+; XOP-NEXT: vpextrw $3, %xmm1, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $3, -24(%rsp,%rax,2), %xmm2, %xmm2
+; XOP-NEXT: vpextrw $4, %xmm1, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $4, -24(%rsp,%rax,2), %xmm2, %xmm2
+; XOP-NEXT: vpextrw $5, %xmm1, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $5, -24(%rsp,%rax,2), %xmm2, %xmm2
+; XOP-NEXT: vpextrw $6, %xmm1, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $6, -24(%rsp,%rax,2), %xmm2, %xmm2
+; XOP-NEXT: vpextrw $7, %xmm1, %eax
+; XOP-NEXT: andl $7, %eax
+; XOP-NEXT: vpinsrw $7, -24(%rsp,%rax,2), %xmm2, %xmm1
+; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; XOP-NEXT: retq
+;
; AVX1-LABEL: var_shuffle_v16i16_from_v8i16:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
@@ -1947,6 +2373,127 @@ define <16 x i16> @var_shuffle_v16i16_fr
}
define <32 x i8> @var_shuffle_v32i8_from_v16i8(<16 x i8> %v, <32 x i8> %indices) nounwind {
+; XOP-LABEL: var_shuffle_v32i8_from_v16i8:
+; XOP: # %bb.0:
+; XOP-NEXT: vextractf128 $1, %ymm1, %xmm2
+; XOP-NEXT: vpextrb $0, %xmm2, %eax
+; XOP-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vmovd %eax, %xmm0
+; XOP-NEXT: vpextrb $1, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $1, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $2, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $3, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $4, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $5, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $6, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $7, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $8, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $9, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $10, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $10, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $11, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $12, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $12, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $13, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $14, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $15, %xmm2, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
+; XOP-NEXT: vpextrb $0, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vmovd %eax, %xmm2
+; XOP-NEXT: vpextrb $1, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $1, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $2, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $2, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $3, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $3, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $4, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $4, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $5, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $5, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $6, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $6, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $7, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $7, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $8, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $8, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $9, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $9, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $10, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $10, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $11, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $11, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $12, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $12, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $13, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $13, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $14, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: vpinsrb $14, -24(%rsp,%rax), %xmm2, %xmm2
+; XOP-NEXT: vpextrb $15, %xmm1, %eax
+; XOP-NEXT: andl $15, %eax
+; XOP-NEXT: movzbl -24(%rsp,%rax), %eax
+; XOP-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
+; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; XOP-NEXT: retq
+;
; AVX1-LABEL: var_shuffle_v32i8_from_v16i8:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
@@ -2657,6 +3204,25 @@ define <32 x i8> @var_shuffle_v32i8_from
}
define <4 x double> @var_shuffle_v4f64_from_v2f64(<2 x double> %v, <4 x i64> %indices) nounwind {
+; XOP-LABEL: var_shuffle_v4f64_from_v2f64:
+; XOP: # %bb.0:
+; XOP-NEXT: vmovq %xmm1, %rax
+; XOP-NEXT: andl $1, %eax
+; XOP-NEXT: vpextrq $1, %xmm1, %rcx
+; XOP-NEXT: andl $1, %ecx
+; XOP-NEXT: vextractf128 $1, %ymm1, %xmm1
+; XOP-NEXT: vmovq %xmm1, %rdx
+; XOP-NEXT: andl $1, %edx
+; XOP-NEXT: vpextrq $1, %xmm1, %rsi
+; XOP-NEXT: andl $1, %esi
+; XOP-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+; XOP-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+; XOP-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
+; XOP-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+; XOP-NEXT: vmovhpd {{.*#+}} xmm1 = xmm1[0],mem[0]
+; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; XOP-NEXT: retq
+;
; AVX1-LABEL: var_shuffle_v4f64_from_v2f64:
; AVX1: # %bb.0:
; AVX1-NEXT: vmovq %xmm1, %rax
@@ -2748,6 +3314,37 @@ define <4 x double> @var_shuffle_v4f64_f
}
define <8 x float> @var_shuffle_v8f32_from_v4f32(<4 x float> %v, <8 x i32> %indices) unnamed_addr nounwind {
+; XOP-LABEL: var_shuffle_v8f32_from_v4f32:
+; XOP: # %bb.0: # %entry
+; XOP-NEXT: vmovd %xmm1, %r8d
+; XOP-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+; XOP-NEXT: andl $3, %r8d
+; XOP-NEXT: vpextrd $1, %xmm1, %r9d
+; XOP-NEXT: andl $3, %r9d
+; XOP-NEXT: vpextrd $2, %xmm1, %r10d
+; XOP-NEXT: andl $3, %r10d
+; XOP-NEXT: vpextrd $3, %xmm1, %esi
+; XOP-NEXT: andl $3, %esi
+; XOP-NEXT: vextractf128 $1, %ymm1, %xmm0
+; XOP-NEXT: vmovd %xmm0, %edi
+; XOP-NEXT: andl $3, %edi
+; XOP-NEXT: vpextrd $1, %xmm0, %eax
+; XOP-NEXT: andl $3, %eax
+; XOP-NEXT: vpextrd $2, %xmm0, %ecx
+; XOP-NEXT: andl $3, %ecx
+; XOP-NEXT: vpextrd $3, %xmm0, %edx
+; XOP-NEXT: andl $3, %edx
+; XOP-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; XOP-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
+; XOP-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
+; XOP-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+; XOP-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; XOP-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[2,3]
+; XOP-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],mem[0],xmm1[3]
+; XOP-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],mem[0]
+; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; XOP-NEXT: retq
+;
; AVX1-LABEL: var_shuffle_v8f32_from_v4f32:
; AVX1: # %bb.0: # %entry
; AVX1-NEXT: vmovd %xmm1, %r8d
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